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David Nedwek Email & Phone Number
Senior Physical Design Engineer
at
NHanced Semiconductors, Inc.
1 work email found
@marvell.com
2 phones found area 971 and 503
LinkedIn matched
4 data sources
Profile completeness 100%
Current company
Role
Senior Physical Design Engineer
Location
Canby, Oregon, United States
Who is David Nedwek? Overview
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Quick answer
David Nedwek is listed as Senior Physical Design Engineer at NHanced Semiconductors, Inc., based in Canby, Oregon, United States. AeroLeads shows a work email signal at marvell.com, phone signal with area code 971, 503, and a matched LinkedIn profile for David Nedwek.
David Nedwek previously worked as Sr. Design Engineer at Marvell Semiconductor and Physical Design Engineer at Intel Corporation. David Nedwek holds Bsee, Electrical Engineering And Computer Science from Marquette University.
Company email context
Email format at NHanced Semiconductors, Inc.
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{first_initial}{last}@marvell.com
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AeroLeads found 1 current-domain work email signal for David Nedwek. Compare company email patterns before reaching out.
Profile bio
About David Nedwek
David Nedwek is a Senior Physical Design Engineer at NHanced Semiconductors, Inc.. He possess expertise in physical design.
Listed skills include Physical Design.
Current workplace
David Nedwek's current company
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9 roles
David Nedwek work experience
A career timeline built from the work history available for this profile.
Senior Physical Design Engineer
CurrentAdvanced semiconductor packagingFull-chip planning and implementationFlow and methodology development
Aug 2023 - Present
Sr. Design Engineer
Partition-level physical designC4 bump planning/placement tool/methodology developmentTape-outs at 28nm and 5nm
Mar 2018 - Jun 2023
Physical Design Engineer
Sep 2015 - Jun 2017
Physical Design Engineer (Contractor)
Owned physical design for designs in 20nm, 16nm, and 14nm process nodes.
Sep 2013 - Sep 2015
Physical Design Engineer (Contractor)
* Owned physical design for two blocks (1M and 2M gates) on a 28nm Silicon processo APR using Synopsys ICC and Mentor Olympuso Evaluated floor-plan bounds and block interfaces, implemented timing-driven placement/routing, developed/implemented/evaluated experiments to balance area with physical/timing convergenceo Evaluated relative strengths of APR design.
Nov 2012 - Jun 2013
Design Engineer
- Senior Design Engineer (2009 – 2012):
- Taped out designs from 250nm to 22nm nodes
- Led floor-plan design and implementation in Synopsys ICC.o Developed / implemented Layout Convergence methodology and flowso Area assignment, interface definition, floor-planning, auto-place-and-route, ECOs, design.
- Utilized ICC P&R system to support layout audits
- First-line manager of mask design teams o Technical oversight, mentoring, work assignment, status tracking and proactive guidance
- Coordinated and instantiated FAB-required layout (scribe, metrology, edge monitors).
Jun 1987 - Jan 2012
Design Engineer
- Design Engineer
- Converted multi-chip circuit modules into single-chip solutions using design suite from VLSI, Inc.
- Generated specification, design, and documentation for cell-based custom and standard-cell CMOSintegrated circuits (two designs through fabrication, first-pass success)
- Used VLSI Technology design system, SPICE circuit analysis; managed Apollo workstation network
Jun 1985 - May 1987
Design Engineer
- Design Engineer
- Performed ECOs on custom integrated circuits using CALMA layout system, MTIME circuit analysis
- Designed CMOS gate array for portable cellular telephone (first-pass success)
- Designed, debugged, and maintained breadboards, supported assembly-language debug monitor
- Generated assembly-language test programs and test procedures for custom IC’s and modem module
Jul 1982 - May 1985
2 education records
David Nedwek education
Bsee, Electrical Engineering And Computer Science
Marquette University
Education record
Nicolet High School
FAQ
Frequently asked questions about David Nedwek
Quick answers generated from the profile data available on this page.
What company does David Nedwek work for?
David Nedwek works for NHanced Semiconductors, Inc..
What is David Nedwek's role at NHanced Semiconductors, Inc.?
David Nedwek is listed as Senior Physical Design Engineer at NHanced Semiconductors, Inc..
What is David Nedwek's email address?
AeroLeads has found 1 work email signal at @marvell.com for David Nedwek at NHanced Semiconductors, Inc..
What is David Nedwek's phone number?
AeroLeads has found 2 phone signal(s) with area code 971, 503 for David Nedwek at NHanced Semiconductors, Inc..
Where is David Nedwek based?
David Nedwek is based in Canby, Oregon, United States while working with NHanced Semiconductors, Inc..
What companies has David Nedwek worked for?
David Nedwek has worked for Nhanced Semiconductors, Inc., Marvell Semiconductor, Intel Corporation, Qualcomm, and Intel.
How can I contact David Nedwek?
You can use AeroLeads to view verified contact signals for David Nedwek at NHanced Semiconductors, Inc., including work email, phone, and LinkedIn data when available.
What schools did David Nedwek attend?
David Nedwek holds Bsee, Electrical Engineering And Computer Science from Marquette University.
What skills is David Nedwek known for?
David Nedwek is listed with skills including Physical Design.
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