Suresh Kumar Sugumaran Email and Phone Number

> Master of Communication Systems Engineering from anna university.> Around 14+ years of experience in Post Silicon Validations covering 3GPP LTE/UMTS Physical Layer and Server SoC Memory controller IPs.> Advanced Python scripting and C programming knowledge with expertise in Embedded Software Development.> System debugging skills using Lauterbach TRACE32 real-time System debugger. > Better understanding of 3GPP wireless Standards communication and signal processing algorithms.> Involved in development of 3GPP LTE UE L1 Downlink Signal chain, Link Adaptation Computation & Reporting of CQI, PMI, RI.> Develop Python testcases for Functional and Regression Post silicon Modem Validations.> Taking ownership in Driving failure debugs and resolution> Firmware Analysis and debugging using Spectrum Analyzers such as Agilent MXA.> System-level knowledge in LTE FDD DL Measurements, LTE FDD CQI and it's reporting, Signal Chain of LTE and Basic functionality and features of UMTS FDD> Hands on experience with Wireless Communication Test Sets such as Anritsu MD8480C, R&S CMW500, CMU200, SMW200A, AMU200A and Agilent 8960 Communication Tester and faders. Extensive usage of Spectrum Analyzers for Firmware analysis and debugging.Specialties: C, MATLAB, Python, TI CCS, Clearcase, Git HubProtocols : 3GPP LTE (36.2xx) and UMTS (25.21x) Physical Layers.> Better Understanding of HBM2e and HBM3 Controller specific Intel and Jedec Standards/Specifications.> Post-silicon Functional Memory sub-system features validation for Server GPU SoC products> Develop Python test cases to validate features on the silicon platform.> using the emulation platforms to validate and debug features before Silicon's Power-on event> Hands-on Lab exposure of debugging using testsets.> Taking ownership in Driving failure debugs and resolutionSpecialties: Python, Pycharm IDE, Git Hub, Synopsys Pre-silicon emulation testbench, Protocols : Jedec standards, HBM2e, HBM3 specifications.