Dawn Ko

Dawn Ko Email and Phone Number

Senior Verification Engineer consultant at Marvell @ Marvell Technology
San Jose, CA, US
Dawn Ko's Location
San Jose, California, United States, United States
Dawn Ko's Contact Details

Dawn Ko personal email

About Dawn Ko

Versatile and experienced verification engineer with broad interests,while still able to focus and deep dive into challenging bugs and designs. Functional verification with UVM, with code coverage and functional coverage.

Dawn Ko's Current Company Details
Marvell Technology

Marvell Technology

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Senior Verification Engineer consultant at Marvell
San Jose, CA, US
Website:
boeing.com
Employees:
134806
Dawn Ko Work Experience Details
  • Marvell Technology
    Senior Verification Engineer Consultant At Marvell
    Marvell Technology
    San Jose, Ca, Us
  • Boeing
    Senior Verification Contractor At Boeing
    Boeing May 2024 - Present
  • Purdue Global Law School
    Law School
    Purdue Global Law School Aug 2023 - Jun 2024
  • Celestial Ai
    Senior Verification Manager
    Celestial Ai Aug 2021 - Jun 2023
    Sunnyvale, California, United States
  • Innovium Inc.
    Senior Verification/Consultant
    Innovium Inc. Jul 2019 - Aug 2021
    San Jose
  • Santa Clara University
    Mba Classes: Strategic Analysis, Business Analytics, Data Analytics, Finance, Global Perspectives
    Santa Clara University Sep 2017 - Dec 2019
    Santa Clara
    Strategic Analysis, Business Analytics, Finance, Data Analytics class using numpy, scipy, and pandas with a good introduction to ML and AI.
  • Bigstream
    Senior Verification Engineer
    Bigstream Oct 2018 - May 2019
    Mountain View, Ca
    Big Data acceleration in FPGA. UVM functional verification from scratch.
  • Intel Corporation
    Senior Verification Engineer
    Intel Corporation Dec 2016 - Sep 2017
    San Francisco Bay Area
    Intel PSG - Fullchip Verification including xprop, metastability. Fullchip testbench integration for FPGA.
  • Imagination Technologies
    Senior Verification Engineer
    Imagination Technologies Jun 2011 - Mar 2016
    Santa Clara, Ca
    Senior Verification - Coordinated cross-site coverage, included code and functional coverage.Regression analysis, grading tests, writing debug tests for a MIPS processor. Created UVM module level testbenches and sequences for a graphics processor. Coded virtual sequencer for random sequences from multiple sequencers. Interfaced to System C model. JTAG and Boundary Scan testing.
  • Tabula
    Senior Verification Engineer
    Tabula Dec 2007 - Dec 2010
    Santa Clara, Ca
    Senior Verification - Developed tests, testbenches, and regressions for the configuration controller of programmable logic.
  • Zerogwireless
    Wireless Verification
    Zerogwireless Mar 2007 - Nov 2007
    Sunnyvale, Ca
    Wireless Verification - Developed WEP, TKIP, and WPA2 tests for the hardware accelerator in the low-power WiFi chip. Developed Analog Mixed-Signal strategy for the RX and TX, and integrated with the digital RTL.
  • Arm, Ltd.
    Technical Lead/ Verification Lead/Manager/Fae
    Arm, Ltd. Mar 2002 - Feb 2007
    Cambridge, England And Los Gatos, Ca
    Technical Lead in England for updated Embedded Trace Macrocell(ETM), coordinating three RTL block redesigns, doubling the performance and significantly improving the quality of the IP. Verification lead for maturity release of 1156.Cortex-R4 Coverage Lead.FAE in California for microprocessors, SOC IP, Debug tools.
  • Filanet
    Verificaton Lead
    Filanet Nov 2000 - Jan 2002
    Sunnyvale, Ca
    Verification Lead - Designed the entire SOC Verification strategy for a LAN networking device.
  • Apple Computer
    Verification Lead
    Apple Computer Oct 1999 - Nov 2000
    Cupertino, Ca
  • Sun Microsystems
    Verification Lead
    Sun Microsystems Jul 1996 - Sep 1999
    Sunnyvale, Ca
  • Intel Corporation
    Verification Engineer
    Intel Corporation 1991 - 1996
    Santa Clara, Ca
    Compatibility Validation and System Validation. Used C++ for Hardware Abstraction layer. x86 debug at the OS kernel level through exception handlers. Logic analyzers. ICE. Post Silicon validation. Cache testing.
  • National Semiconductor
    Co-Op Engineer
    National Semiconductor May 1990 - Aug 1990
    Santa Clara, Ca
    LAN Group

Dawn Ko Skills

Asic Soc Verilog Hardware Semiconductors Embedded Systems Microprocessors Eda Fpga Debugging Arm System On A Chip Systemverilog Rtl Design Application Specific Integrated Circuits Vlsi Ic Arm Architecture Field Programmable Gate Arrays Processors Integrated Circuits Perl Python Cross Functional Team Leadership Universal Verification Methodology Functional Verification C++ C (Programming Language Ray Tracing Silicon Validation Computer System Validation Pandas Numpy Joint Test Action Group Microsoft Excel Microsoft Powerpoint Microsoft Office Engineering Verification And Validation System Verification Rtl Verification Hardware Verification Data Verification Validation

Dawn Ko Education Details

Frequently Asked Questions about Dawn Ko

What company does Dawn Ko work for?

Dawn Ko works for Marvell Technology

What is Dawn Ko's role at the current company?

Dawn Ko's current role is Senior Verification Engineer consultant at Marvell.

What is Dawn Ko's email address?

Dawn Ko's email address is da****@****hoo.com

What schools did Dawn Ko attend?

Dawn Ko attended Santa Clara University, University Of Illinois Urbana-Champaign.

What skills is Dawn Ko known for?

Dawn Ko has skills like Asic, Soc, Verilog, Hardware, Semiconductors, Embedded Systems, Microprocessors, Eda, Fpga, Debugging, Arm, System On A Chip.

Who are Dawn Ko's colleagues?

Dawn Ko's colleagues are Tessi Brumley, Porter Leverett, Kim Reed, Nabil Ahmad Sadi, John Baber, Carol Bilson, Kimberley Taylor.

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