Daniele Cesarini Email & Phone Number

Bologna, It

Bologna, Emilia-Romagna, Italy

▪ Member of the CINECA’s technical committee that designs next-generation HPC architectures to define the strategic roadmap of Italian and European supercomputers.▪ Project manager of several European founded projects (EPI-SGA1, EPI-SGA2, EUPEX, REGALE, etc.) and the National Recovery and Resilience Plan (PNRR) in the contest of the National Centre for HPC, Big Data and Quantum Computing (Spoke 1 - Future HPC).▪ Member of the design team of Leonardo supercomputer installed in the CINECA’s data centre at the Big Data Technopole in Bologna, Italy.▪ Elected and serves in the scientific advisory board of EuroHPC JU (RIAG) for identifies research and innovation priorities to support the development of an integrated HPC, quantum computing and big data ecosystem in the European Union.▪ Elected as Vice-chair for Research of ETP4HPC, an industry-led think-tank promoting European HPC research and innovation in Europe.▪ Coordinator of the energy efficient HPC activities of CINECA focused to improve the energy efficiency and the sustainability of the CINECA's computing infrastructures.

Bologna, Emilia-Romagna, Italy

▪ Involved in the research group of Prof. Luca Benini (G Scholar H-index >120, ERC-advanced grant winner) working in the scientific area related to supercomputers.▪ Designed SW-HW co-design strategies as well as algorithms for parallel programming support for energy efficient HPC systems.▪ Defined codesign activities to improve the microarchitecture efficiency of high-performance processors.▪ Focused on performance optimization and evaluation of HPC codes on large scale computing systems.

Bologna, Emilia-Romagna, Italy

▪ Modelled HPC applications with target on parallelization strategies, energy consumption and heat generation.▪ Developed propagation mechanisms from the application requirements to the operating system and runtime.▪ Developed thermal-aware and energy efficient allocation strategies for heterogeneous HPC nodes.

Zurich, Switzerland

▪ Collaborated with Prof. Mathieu Luisier (ACM Gordon Bell Prize in 2019), head of the Nano-TCAD group of the Integrated Systems Laboratory in the Dept. of Information Technology and Electrical Engineering.▪ Developed energy-efficient strategies and fine-grain profiling runtimes for HPC codes running on large-scale heterogeneous systems.▪ Investigated the energy efficiency and the performance of OMEN code for quantum transport simulator.

San Diego, California, United States

▪ Collaborated with Prof. Rajesh K. Gupta (G Scholar H-index >70), head of MESL lab and Director of the Department of Computer Science & Engineering at the UC San Diego Jacobs School of Engineering.▪ Focused on the on the research area related on the microelectronic variability.▪ Developed an OpenMP variability-aware runtime based on tasking model suitable for embedded shared-memory cluster SoCs

Rimini, Emilia-Romagna, Italy

▪ Worked in partnership with customers, advising them how to use ICT technology to meet their business objectives▪ Defined the scope of customer's project, planning timescales and the required resources▪ Defined software, hardware and network requirements

Executive Mba

▪ Courses: Global Strategy, Leadership, People Management, Performance Management Systems, Supply Chain Management, Marketing and Sales.

Doctor Of Philosophy (Ph.D.), Electronics, Telecommunications, And Information Technologies Engineering

▪ PhD Topic: Energy Efficient High Performance Computing ▪ Thesis: Power and Thermal Management Runtimes for HPC Applications in the Era.

Master Of Science (M.S.), Computer Engineering

▪ Thesis: OpenMP Task Scheduling Strategies to Mitigate Hardware Variability in Tightly-Coupled Shared Memory Clusters ▪ Thesis Topic.

Bachelor Of Science (B.S.), Computer Engineering

▪ Thesis: Sistemi per il Cloud Computing: Analisi dell’Infrastruttura Open Source Eucalyptus ▪ Thesis Topic: Cloud Computing ▪ Advisor.