Deb Dean Email & Phone Number

Rtp, Nc

Static Timing Analysis on PowerPC Processor• Lead timing analysis engineer for Power chip in 7nm and 5nm microprocessor design

Rtp, Nc

Static Timing Analysis on PowerPC Processor• Lead timing analysis engineer for nest logic unit in 14nm microprocessor design

Rtp, Nc

Static Timing Analysis on PowerPC processor• Lead timing analysis engineer for complex 22nm and 45nm microprocessor designs with a mix of ASIC and server methodologies. Analyzed timing results from unit and chip analyses and provided input for changes needed to meet design requirements.• Proposed programs in 5 areas to automate and improve quality of design and analysis to IBM management. Gained approval and implemented improvements resulting in significantly improved product quality. Programs written in perl, ksh, csh and tcl. Created web pages to document and communicate information to user community.• Key member of global project team with responsibility for reporting on timing closure and escalating issues requiring management focus.Random Logic Macro Engineer• Created physical design data for random logic macros using programs and automation scripts. Documented procedures to facilitate debug when problems occurred.• Implemented incremental design changes to macros in layout environment. Increased scope of work by learning layout and routing software.PLB4 & 5 Toolkit Developer• Enhanced and maintained PLB4 (Processor Local Bus) CoreConnect Toolkit. This is code written in VHDL that emulates the PLB4 specification. It allows designers to simulate bus interactions with their logic.• Created web-based environment for regression testing of local processor bus toolkit.ASIC Library Manager• Led coordination of releases of ASIC (Application Specific Integrated Circuit) library for embedded IBM PowerPC design team.• Ensured ASIC library updates were synchronized with PowerPC processor development team schedules to minimize impact.• Responsible for populating ASIC library with completed microprocessor design for customers.

Durham, Nc

CAD Engineer• Supported Mentor Graphics tools for VLSI design team. Wrote scripts in perl, tk and c-shell to automate design tasks and provided needed documentation.

Binghamton/Syracuse, Ny

• Developed scripts to improve quality of design analysis.• Installed and tested new software for all phases of hardware design.• Expert in Mentor Graphics software. Taught classes to design team in use of software.• Focal point for digital design community, identifying and supporting “best of class” tools for logic and physical design.• Established and participated in user’s groups for Mentor Graphics software for GE Aerospace.• Technical expert in digital simulation and led team that performed for digital designers.