Debjyoti Bhattacharjee Email & Phone Number

Leuven, Flemish Region, Belgium

Leuven, Flemish Region, Belgium

R&D Team leader for COMPASS team. Responsible for hiring and contributing technically alongside the team for each of the following activities,o Hardware component modelling: The team contributed towards modelling different components of high performance novel compute systems to aid in enablement of hardware-software codesign. o Simulator integration: Contributed towards enabling interplay of different high level simulators (RISC-V ISS, cycle accurate simulators, systemC models, etc.) to model systems, using existing modelling IP blocks. o Performance analysis: Led team to develop comprehensive methodology for performance debug and calibration of system performance from scratch. The work drove several initial node level architecture path finding studies. During a significant portion of this duration, responsibilities include proactively hiring to sustain the tempo of activities, understanding the modelling flows and dependencies, solving bottlenecks and collaborating with other teams to resolve the dependencies.

Belgium

Responsible for the modeling, analysis and conducting performance studies for future multi-core digital analog accelerator architecturefor neural network inference.o Formulated a templated architecture with hybrid digital SIMD computation and Analog-in-memory compute cores, that permits efficient compile-time planning of data movement.o Lead a team to build analytical models for the building blocks of the architecture to enable go-no go decisions at path finding stage. o A design space exploration framework was developed to allow push-button design-technology cooptimization.The framework allowed architecture evaluation in terms of performance, power and area and BW requirements. The framework has been adopted by multiple industry partners.During this time several architectural studies were conducted for topology, bandwidth and latency analysis of the architecture. The results have been disseminated in ISCAS, IEDM and JETCAS.

Singapore

Haifa Area, Israel

ASIC^2 Technion Research Group.

Singapore

Integrated Systems Laboratory Lsi

Germany

Worked on Crypto-Hardware Accelerator Design.

Studying some image properties towards 3D reconstruction of an object.

Doctor Of Philosophy (Phd), Post-Cmos Logic Synthesis, 5.0

Activities and Societies: Welfare and Feedback committee. NTU Graduate Students Council.Logic synthesis and technology mapping.

Master Of Technology (Mtech), Computer Science And Engineering

B Tech, Computer Science And Engineering