Deepak Bhatia

Deepak Bhatia Email and Phone Number

Physical Design Engineer at AWS Annapurna Labs @ Amazon Web Services (AWS)
seattle, washington, united states
Deepak Bhatia's Location
Austin, Texas, United States, United States
About Deepak Bhatia

Experienced Physical Design Engineer with a demonstrated history of working in the semiconductors industry. Strong engineering professional skilled in Physical Design, Standard Cell Design and Characterization, Register File Design and Functional Verification.

Deepak Bhatia's Current Company Details
Amazon Web Services (AWS)

Amazon Web Services (Aws)

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Physical Design Engineer at AWS Annapurna Labs
seattle, washington, united states
Employees:
72973
Deepak Bhatia Work Experience Details
  • Amazon Web Services (Aws)
    Physical Design Engineer
    Amazon Web Services (Aws) May 2022 - Present
    Austin, Texas, United States
  • Intel Corporation
    Physical Design Engineer
    Intel Corporation Jan 2017 - May 2022
    Santa Clara
    Physical Design (Back-End) for Server blocks.As a Physical Design Engineer work involves1. Synthesizing the design using Design Compiler.2. Auto PnR using ICC1 and ICC2 flows.3. Floor-planning and congestion analysis.4. Perform Clock tree synthesis for high speed design.5. Power analysis using PTPX and power optimization.6. Sign-off timing using Prime-Time.7. Perform extraction and noise analysis.8. Perform all ERC fixing.9. Functional Equivalence using Conformal
  • Intel
    Senior Component Design Engineer
    Intel Apr 2014 - Dec 2016
    Santa Clara
    Work in the Standard Cell Library Design team. As a design engineer in the team i work in the following area1. Design of standard cells (basic , complex , sequential, retention, synchronizer cells)2. Characterization of standard cells to generate CCST and NLDM models.3. Physical collateral generation such as FRAM/LEF.4. Automation for circuit design.In addition to this I was a rotation engineer working on Register file design.1. Worked on making the floor-plan and design of several register file blocks2. Sytem-verilog code for register blocks.3. FEV and static timing Analysis of register file blocks
  • Intel Corporation
    Component Design Engineer
    Intel Corporation Feb 2009 - Mar 2014
    Santa Clara
  • Integrated Circuits Research Labs, Ufl
    Research Assistant
    Integrated Circuits Research Labs, Ufl May 2007 - Dec 2008
    As a member of the ICR group i worked on the following items:1. Design of standard cell library.2. Digital Phase lock Loop Design3. Digital Delay Lock Loop Design

Deepak Bhatia Education Details

Frequently Asked Questions about Deepak Bhatia

What company does Deepak Bhatia work for?

Deepak Bhatia works for Amazon Web Services (Aws)

What is Deepak Bhatia's role at the current company?

Deepak Bhatia's current role is Physical Design Engineer at AWS Annapurna Labs.

What schools did Deepak Bhatia attend?

Deepak Bhatia attended University Of Florida.

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