design chip for auto driving vehicle.developing and optimizing convolutional neural network (CNN) engines that leverage integer and half-precision (fp16) arithmetic. building comprehensive performance models to predict and analyze the efficiency and throughput of various computational tasks. integration and interconnect of chiplets of chiplets using UCIe

design AI chip for cloud server

Lead hardware engineering team

Technical lead of 28Gbps transceiver sub-system on 14nm and 28nm

Provide expert assistance in high-speed system solutions for Altera devices and our IP solutions, and resolve component and tools issues in a timely and complete manner to ensure a successful design experience with Altera FPGA products.- Led cross-functional initiative for Transceiver Register Map tool- Cisco Technical Manager for Stratix 10 solution- Led XCVR knowledge transfer from factory to worldwide regions

Responsible for promotion Altera total solutions( FPGA, Embeded DSP, IPcore, Hardcopy and Software) to Strategic Account(Huawei, Ericsson, ALU) in Chengdu. Mainly focused on the following platforms: Wireless, Transmission, OTN Pre-research, Enterprise Storage.

Be the main expert focal point for guiding customers from system concept to implementation with FPGA's high-speed transceivers.Train customers and internal groups about high-speed transceivers.

Provided technical consultation (e.g. competitive analysis, system simulation, example designs and hardware debug) to Altera's sales force, field application engineers, marketing and customers on FPGA related issues.