Derek Corcoran Email & Phone Number

Dresden, Saxony, Germany

Caerphilly, Wales, United Kingdom

Short term contract supporting the team on various IT projects including new product automation in Oracle NetSuite, DX shipping integration using Microsoft Visual Studio, custom built dashboard for Warehouse operations management using Blazor.

Edinburgh, Scotland, United Kingdom

Primary role supporting NPI (new product introduction) across multiple wafer Fab Foundries and related technology and product issues on multiple process technologies (180BCD, 55BCDLite, 22ULL) from product definition through to volume production. This involves regular communication with the Foundries across Europe and Asia as well as with the various design and support groups spanning the USA, UK and Asia.Key Achievements:• Drove the investigation of multiple issues on a new… Show more Primary role supporting NPI (new product introduction) across multiple wafer Fab Foundries and related technology and product issues on multiple process technologies (180BCD, 55BCDLite, 22ULL) from product definition through to volume production. This involves regular communication with the Foundries across Europe and Asia as well as with the various design and support groups spanning the USA, UK and Asia.Key Achievements:• Drove the investigation of multiple issues on a new product operating at the highest voltages used on a BCD technology, working closely with the Foundry as well as key internal stakeholders. Carried out extensive device characterisation over a period of more than 6 months (both internally and at the Foundry) to define safe operating areas (SOA) and automated checks. Worked closely with the design group verifying that all changes to the final product design met the updated SOA requirements. Product testing on the latest silicon revision confirmed design changes were successful.• Led the team driving the Foundry to identify the process root cause of RTS (random telegraph signal) noise issue on a new product design. Worked hand in hand with the Foundry to define the splits for root cause identification and later the definition of process improvements, detailed qualification plans and schedules. Provided regular technical project updates to the key customer.• Project lead for additional Fab bring-up working with Foundry team to drive process and tool matching criteria, qualification plans and schedules to support additional capacity. Led co-ordination with cross-functional groups to ensure schedules were well defined and resources in place to support key activities during various phases of the project.• Developed JMP scripts, add-ins and dashboards to automate various aspects of data analysis (WAT, SOA) to significantly reduce repetitive manual data manipulation, standardise report output and increase productivity. Show less

Newport, Newport, United Kingdom

Managed the joint development of a key customer’s next generation high speed ESD protection technology utilizing buried layers, EPI & deep trench isolation (DTI).• Defined all aspects of the project from the initial technology development through to the technology & product qualification.• Led the technical team for the technology setup from definition phase (module process set up, process integration architecture, reticle design & manufacture, electrical testing) through to… Show more Managed the joint development of a key customer’s next generation high speed ESD protection technology utilizing buried layers, EPI & deep trench isolation (DTI).• Defined all aspects of the project from the initial technology development through to the technology & product qualification.• Led the technical team for the technology setup from definition phase (module process set up, process integration architecture, reticle design & manufacture, electrical testing) through to first successful electrical prototype in just over 4 months. Show less

Bristol, United Kingdom

Worked on the most advanced AI processor, investigating yield loss mechanisms from product manufacturing and testing.• Setup automated yield reporting systems for both final test and wafer probe. • Involved in assessing the product reliability and identifying risks and working closely with the test engineer to define improved test screening. • Supported the characterisation of board level testing and system level performance helping to identify major factors in power consumption… Show more Worked on the most advanced AI processor, investigating yield loss mechanisms from product manufacturing and testing.• Setup automated yield reporting systems for both final test and wafer probe. • Involved in assessing the product reliability and identifying risks and working closely with the test engineer to define improved test screening. • Supported the characterisation of board level testing and system level performance helping to identify major factors in power consumption and performance. Show less

Edinburgh, United Kingdom

Foundry interface for the 55nm BCD process transfer from fab in Asia to Europe to support 2nd site qualification for additional capacity. This involved twice weekly calls with the Foundry and frequent on-site visits. • Managed the project schedule, closely reviewing the technical progress with the Foundry, ensuring the required timescales for qualification were met to support production.• Worked closely with the planning and project management teams to ensure alignment of… Show more Foundry interface for the 55nm BCD process transfer from fab in Asia to Europe to support 2nd site qualification for additional capacity. This involved twice weekly calls with the Foundry and frequent on-site visits. • Managed the project schedule, closely reviewing the technical progress with the Foundry, ensuring the required timescales for qualification were met to support production.• Worked closely with the planning and project management teams to ensure alignment of resources and budget in place to meet the required timescales for full qualification. Qualification of process & product achieved in less than 12 months with volume production released in receiving fab.• Support for NPI, including E-Test analysis of key qualification lots, interfacing with product and test engineering groups for yield analysis, assembly groups to ensure a smooth transfer from FAB to assembly as wells as support for legacy products for any FAB related issues (visual, yield or reliability concerns). Show less

Newport, Newport, United Kingdom

Newport, United Kingdom

Managing a small team of experienced engineers supporting integration and device issues on 200mm HV CMOS process and more recently, MV GaN process.

Newport, United Kingdom

Managed a team of 5 experienced engineers and 2 technicians, covering 3 power IC processes (HVIC, LVIC, HCIC) in 2 different fabrication facilities (150mm and 200mm). Responsibilities included new product introduction, resolution of process integration, EOL device and wafer probe yield issues, scrap reduction, process simplification and maintaining product yield targets.Key achievements:• Led a cross-functional team covering R&D, process integration, product engineering, QA and… Show more Managed a team of 5 experienced engineers and 2 technicians, covering 3 power IC processes (HVIC, LVIC, HCIC) in 2 different fabrication facilities (150mm and 200mm). Responsibilities included new product introduction, resolution of process integration, EOL device and wafer probe yield issues, scrap reduction, process simplification and maintaining product yield targets.Key achievements:• Led a cross-functional team covering R&D, process integration, product engineering, QA and operations to resolve various manufacturing issues, including SPC, scrap and wafer fab yield issues on our state-of-the-art GaN on silicon process technology to support the transition to production release. Identified main causes of Rdson yield loss using DOE methodology. Identified optimised process conditions after 2 cycles of learning (2 lots) resulting in an improvement in yield from between 50% to 60% to greater than 90%.• Eliminated a major gate oxide scrap issue on an automotive technology, reducing the scrap rate from 20% to virtually zero in 3 months, resulting in cost savings of >200k$ while avoiding a re-qualification of the technology.• Supported the capacity expansion of the HCIC platform qualifying additional tools to support wafer starts approx. 3 times higher than previously while improving yield and scrap performance.• Led the team of cross functional engineers to resolve a yield loss issue on our most advanced technology, recovering the yields from 50% to > 90% in 3 months, enabling a key customer to release their new product line on time.• Drove the implementation of automated daily yield and PCM reports for the key group metrics to improve productivity and information sharing across groups. Developed a fully automated system allowing the early detection of specific process equipment related yield and PCM issues using commercially available software. Show less

Ireland

Involed in the startup of 90nm production ramp at Intel's 1st 300mm facility in Ireland. Responsibilites included the identification of tool and process issues causing low yield and support of process integration and module improvements.

Singapore

Worked as a key member of the 0.18um team including mentoring other team members in experimental design and statistical analysis of electrical test and SORT yield/parametric results.• Drove the use of design of experiment (DOE) methodology for fast and efficient process optimisation for a foundry compatible process.• Developed an optimised Co silicide process using DOE methodology for analogue product performance, completed in 2 cycles of learning.• Enabled the 1st time… Show more Worked as a key member of the 0.18um team including mentoring other team members in experimental design and statistical analysis of electrical test and SORT yield/parametric results.• Drove the use of design of experiment (DOE) methodology for fast and efficient process optimisation for a foundry compatible process.• Developed an optimised Co silicide process using DOE methodology for analogue product performance, completed in 2 cycles of learning.• Enabled the 1st time prototype success with a new customer design with a new resistor and fuse by defining and verifying 2 new mask generation algorithms.• Project managed several 0.25µm technology transfers, including project planning, chairing weekly customer conference calls and managing the technical progress. Matching of the customer process was completed with only 3 cycles of learning. Show less

Greenock, Scotland

• Developed optimised Co salicide process on graded SiGe structures and in-situ As doped polysilicon emitter process for inclusion in the full SiGe BiCMOS production processes in National Semiconductor, Santa Clara using DOE techniques.• Carried out electrical characterisation and co-ordinated the material characterisation of the SiGe deposition process (selective and non-selective processes). • Defined splits for process characterisation, including wafer processing and… Show more • Developed optimised Co salicide process on graded SiGe structures and in-situ As doped polysilicon emitter process for inclusion in the full SiGe BiCMOS production processes in National Semiconductor, Santa Clara using DOE techniques.• Carried out electrical characterisation and co-ordinated the material characterisation of the SiGe deposition process (selective and non-selective processes). • Defined splits for process characterisation, including wafer processing and measurement of the growth process for an advance SiGe BiCMOS process. Show less