Derek Summers
AeroLeads people directory · profile

Derek Summers Email & Phone Number

Photolithography Engineer at IBM
Location: Albany, New York Metropolitan Area, United States 10 work roles 1 school
LinkedIn matched
✓ Verified July 2026 3 data sources Profile completeness 86%

Contact Signals

LinkedIn Profile matched
3 free lookups remaining · No credit card
Current company
IBM
Role
Photolithography Engineer
Location
Albany, New York Metropolitan Area, United States

Who is Derek Summers? Overview

A concise factual answer block for searchers comparing this professional profile.

Quick answer

Derek Summers is listed as Photolithography Engineer at IBM, based in Albany, New York Metropolitan Area, United States. AeroLeads shows a matched LinkedIn profile for Derek Summers.

Derek Summers previously worked as Member of Technical Staff – ASML Equipment Controls/Reticle Engineer, Photolithography at Globalfoundries and Member of Technical Staff - New Technology Development Process Engineer, Photolithography at Globalfoundries. Derek Summers holds Bachelor'S Degree, Microelectronic Engineering from Rochester Institute Of Technology.

Company email context

Email format at IBM

This section adds company-level context without repeating Derek Summers's masked contact details.

IBM

Review company-level records connected to Derek Summers before choosing the right outreach path.

Profile bio

About Derek Summers

Derek Summers is a Photolithography Engineer at IBM.

Current workplace

Derek Summers's current company

Company context helps verify the profile and gives searchers a useful next step.

IBM
Ibm
Photolithography Engineer
Albany, NY, US
AeroLeads page
10 roles · 25 years

Derek Summers work experience

A career timeline built from the work history available for this profile.

Role listed

Ibm

Albany, Ny, Us

Member Of Technical Staff – Asml Equipment Controls/Reticle Engineer, Photolithography

Current

Malta, Ny, Us

Lead, develop and implement improved ASML scanner equipment monitoring controls for dose, focus and overlay performance. Analyze production runtime data to identify opportunities for improvement, including automation and reduced sampling to minimize engineering time and optimize production cycle time. Serve as defect expert for reticle engineers.Created a faster dose monitor for 193nm immersion scanners. Qualified and implemented new photoresist for equipment control monitors leading to $K in cost savings.Managed team to qualify a secondary pellicle supplier for KrF reticles to ensure supply for new product orders.Collaborated with worldwide fabs to benchmark and identify opportunities for reticle creation process improvements.

2022 - Present ~4 yrs 6 mos

Member Of Technical Staff - New Technology Development Process Engineer, Photolithography

Malta, Ny, Us

Served as strategist and lead process development engineer. Worked with customers to develop and qualify novel 14nm technology for volume manufacturing, including tool and process technology characterization, troubleshooting and qualification, system and recipe setup and manufacturing. Met with customers daily to review progress and stay on schedule to achieve technology development milestones. Collaborated internally across integration, yield, process modules and metrology engineers for technology qualification. Completed both internal and customer quality documentation for equipment and process qualifications.

2018 - 2022 ~4 yrs

Euv Equipment Engineer

Malta, Ny, Us

Served as company representative for EUV equipment factory acceptance. Served as engineer responsible for setup of EUV equipment control automation, recipe integration with factory systems, equipment qualifications and equipment controls.Served as company representative in Veldhoven, Netherlands for factory acceptance of EUV lithography equipment. Drove automation design and testing, including system recipe parameter automation and debugging. Led equipment control automation, including monitoring for line width uniformity.

2017 - 2018 ~1 yr

Member Of Technical Staff - Lithography Unit Process Engineer

Malta, Ny, Us

Led a team of lithography unit process engineers responsible for setup, control and optimization of contact/via module lithography processes while managing projects for lean manufacturing opportunities. Managed contact, metal and via process modules for 14nm, 20nm, 28nm, 32nm nodes including lithography equipment and process qualification. Collaborated with process, device and equipment teams to resolve process and tool issues impacting production. Applied lean manufacturing principles to identify and implement new product introduction characterization. Used advanced process control systems to replace manual recipe setup and analysis resulting in time savings equal to 5 full-time engineers. Completed process technology comparison between 20nm and 14nm to realize cross-technology yield benefits and cost savings opportunity of several $ million in chemical and maintenance costs. Led technology development and transfer between development and manufacturing teams. Mentored several college graduates and experienced new hire employees, including process and system training. Trained technicians to manage Statistical Process Control (SPC) setup and maintenance while introducing Fault Detection & Classification (FDC) to reduce mean time and identify process shifts before impacting yield.

2013 - 2017 ~4 yrs

Principal Engineer - Lithography Unit Process Engineer

Malta, Ny, Us

Served as founding member of photolithography team tasked with start-up of semiconductor Fab 8 facility and first silicon. Transferred and qualified 28nm process technology from Fab 1 Dresden, Germany as well as 32nm process technology from IBM Fishkill. Held residency in Germany to document process specifications and constraints for technology transfer to Malta, New York.Characterized and optimized new resist processes for 20nm, 28nm, 32nm. Utilized Design of Experiments (DOEs) to optimize specifications of contact to gate overlay based on yield and parametric data. Reduced cycle time of lithography equipment install and process qualification. By collaborating with equipment, process integration, metrology, yield teams and executive management to qualify lithography equipment in record time 30d. Collaborated with Optical Proximity Correction (OPC) engineers to build and verify model-based OPC keywords.

2011 - 2013 ~2 yrs

Photolithography Unit Process Engineer

Freescale Semiconductor

Owned and managed front end-of-line photolithography unit process layers. Served as photolithography statistical process control champion to manage and report Process Capability Index (Cpk) performance of internal and key customer specifications. Led team of technicians and operators to oversee reticle inspection and inventory management for ATMC. Qualified new resist processes for 90nm and 130nm node-critical modules. Developed reticle inspection and tracking strategy to reduce the risk of yield limiting reticle defects and reticle inventory. Led acceptance project for KLA STARlight reticle inspection tool from inception to completion.

2005 - 2011 ~6 yrs

Process & Integration Research And Development Engineer, Dan Noble Center

Freescale Semiconductor

Served as member of the Research Team responsible for 65nm and 90nm technology research and development. Evaluated Attenuated Phase Shift Mask (APSM), Complementary Phase Shift Mask (CPSM) and Chromeless Phase Lithography (CPL) reticle technologies based on process window, resolution, uniformity and through pitch.Supported process development of contact and via layers on 193nm ASML scanners.Analyzed effects of polysilicon film change based on parametric and yield results.

2004 - 2005 ~1 yr

Reticle Technology Development Engineer

Brookfield, Ct, Us

Served as member of the Process Development Team with responsibility for 90nm technology. Improved 90nm development photolithography metrology cycle time by 50% by correlating Scanning Electron Microscope (SEM) to optical-based metrology. Optimized SEM recipe design and setup for resolution, linearity, and registration through pitch data collection. Analyzed and reported results to develop and optimize ebeam reticle write processing.

2003 - 2004 ~1 yr

Reticle Technology Research Engineer

Brookfield, Ct, Us

Served as member of Materials Research Team tasked with materials research and development of novel reticle thin film technology to enable advanced process nodes. Completed factory acceptance and site qualification of a Veeco LDD Ion Beam Deposition Tool. Reduced defect levels and optimized film thickness and optical properties of antireflective chrome and silicon nitride films.

2002 - 2003 ~1 yr
1 education record

Derek Summers education

  • Rochester Institute Of Technology
    Rochester Institute Of Technology
    Microelectronic Engineering
FAQ

Frequently asked questions about Derek Summers

Quick answers generated from the profile data available on this page.

What company does Derek Summers work for?

Derek Summers works for IBM.

What is Derek Summers's role at IBM?

Derek Summers is listed as Photolithography Engineer at IBM.

Where is Derek Summers based?

Derek Summers is based in Albany, New York Metropolitan Area, United States while working with IBM.

What companies has Derek Summers worked for?

Derek Summers has worked for Ibm, Globalfoundries, Freescale Semiconductor, and Photronics.

How can I contact Derek Summers?

You can use AeroLeads to view verified contact signals for Derek Summers at IBM, including work email, phone, and LinkedIn data when available.

What schools did Derek Summers attend?

Derek Summers holds Bachelor'S Degree, Microelectronic Engineering from Rochester Institute Of Technology.

Find 750M verified contacts

Search by job title, company, industry, location, and seniority. Export verified B2B contact data when you need it.