David Hepner Email & Phone Number

Design and implement control system for bio-digester.

Developing electronic solutions for several areas of research ranging from recording tape to high vacuum deposition systems.Responsible for identifying technology for 10 Gigabit Fibre Channel and iSCSI for Host Adapters in an Enterprise Storage System. Responsible for the schematic entry and PCB architecture of 10 Gigabit Fibre Channel interface subsystem.Developed signal integrity constraints for board designs and implemented the constraints in the board file using Cadence tools.Worked on the design team for a storage controller, developing the requirements for board layout including signal integrity. Supported storage controller testing.Coordinated the transfer of the design of the storage system from development to contract manufacturing in Singapore. Generated RFQ for the technology and managed the evaluation of the responses.Performed data integrity analysis on a disk pack subsystem containing 16 disks and management logic.

Project Management:Lead team of EE, ME and software engineers to design an antenna controller that contained two VME cards and assorted COTS boards that included three PowerPC CPU boards.Coordinated the work of the ME's, technicians and manufacturing to have five units redesigned, built and tested. Units were delivered on time and within budget.System Design:Performed system design for system Built In Test (BIT). Output was a System BIT specification that influenced the design of the hardware and software to enable the complete pre-mission test of the system. Digital Design:Designed and integrated a Fibre Channel to PCI (PMC) interface board for a Motorola VME PowerPC board. Design incorporated into a system with 40 nodes.Member of team that designed Chip set implementing Fibre Channel Standard (FC-1, FC-2).Designed two FPGAs using VHDL for a Fibre Channel Repeater.Worked with Mentor Graphics, Synplify, and Model Technology ModelSim.