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Dimitar Kavalov Email & Phone Number

System Evaluation Engineer at Cirrus Logic
Location: Woolton Hill, England, United Kingdom 10 work roles 3 schools
1 work email found @ieee.org LinkedIn matched
✓ Verified July 2026 4 data sources Profile completeness 100%

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Current company
Cirrus Logic
Role
System Evaluation Engineer
Location
Woolton Hill, England, United Kingdom
Company size
1472 employees

Who is Dimitar Kavalov? Overview

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Dimitar Kavalov is listed as System Evaluation Engineer at Cirrus Logic, a with 1472 employees, based in Woolton Hill, England, United Kingdom. AeroLeads shows a work email signal at ieee.org and a matched LinkedIn profile for Dimitar Kavalov.

Dimitar Kavalov previously worked as Senior Design Engineer at Socionext Europe (Spin Off Of Fujitsu Semiconductors Europe) and Senior Design Engineer at Fujitsu Semiconductor Europe (Fseu). Dimitar Kavalov holds Phd, Electrical/Electronic Engineering from Oxford Brookes University.

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{first_initial}{last}@ieee.org
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Profile bio

About Dimitar Kavalov

I am a highly-skilled electronic engineer educated to a PhD level with extensive experience and interests in electronics/microelectronics, data/signal processing, including: - concept research, system level modelling and algorithm development - DSP - system level evaluation - AI (neural networks) - embedded systems - scripting/software development - deep sub-micron physicals level design implementation and flow automation - IC design/EDA software tools for deep sub-micron design - Physical/Electrical Variability influence on the physical design closure process - customer support - technical leadershipExpertise: - Problem solving and strong analytical skills- System level modelling design and evaluation - DFT (FFT) techniques, Direct Digital Synthesis, DMT/OFDM, custom tailored DSP techniques- Neural networks (machine learning) and statistical processing - Deep Sub-micron digital design flow (Synthesis, Placement, Routing, Optimisation, Extraction, Timing -- Analysis, Power Analysis) for 90-65-45-28nm technology nodes. Full custom chips layout and verification- Surface acoustic wave (SAW) device technologyTools:- Matlab, Python, C/C++, VBA, TCL, AWK, SED, Unix/Linux shells (csh, bash, sh)- GitLab- Cadence Design flow tools including RTL Compiler, Innovus (Encounter EDI), Tempus (ETS), Voltus , etc.- Synopsys Design tools (PrimetimeSI)- Verilog/SystemVerilog, VHDLExtended knowledge:- SERDES, FEC encoder/decoder architectures, Time interleaved ADC/DAC architectures

Listed skills include Mixed Signal Design, 40Nm And 28Nm Back End Implenetation, Analogue Layout And Design Verification, Tcl, and 14 others.

Current workplace

Dimitar Kavalov's current company

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Cirrus Logic
Cirrus Logic
System Evaluation Engineer
austin, texas, united states
Website
cirrus.com
Employees
1472
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10 roles

Dimitar Kavalov work experience

A career timeline built from the work history available for this profile.

System Evaluation Engineer

Current
Cirrus Logic

Newbury, Uk

Sep 2019 - Present

Senior Design Engineer

Socionext Europe (Spin Off Of Fujitsu Semiconductors Europe)

Maidenhead, Uk

- Development of a high speed single channel Discrete Multi Tone PHY (DMT is baseband OFDM) for transmission of 100+Gbps data over optical communication channel- System level modelling and simulation using Matlab and Python - Full system level evaluation using Python interface and C++ firmware- Evaluation data mining and analysis with Python, Matlab and VBA (Excel)

Apr 2015 - Apr 2019

Senior Design Engineer

Fujitsu Semiconductor Europe (Fseu)

Maidenhead, Uk

Main responsibilities:- Digital layout (RTL to GDS2/OASIS) working in mixed signal layout/physical verification (up to 28nm)- Design flow development- Power analysis techniques- Package parasitics analysisExperience: - Successfully laid out, verified and taped out a number of top level flip chips as well as some high speed interface (analog/digital) hierarchical blocks.Tools:-Cadence, Synopsys and Mentor Graphics design tools and flows.Extra activities:- Towards the end of the period I moved to system level design and evaluation where I worked on a high speed discrete multi-tone (DMT) bases optical commutation system capable of transmitting/receiving 100+ Gb/s

Sep 2010 - Mar 2015

Principal Design Methodology Engineer

Nxp Semiconductors

Technical project lead. Investigation of the influence of various electrical variables in the design closure process. Researched and implemented optimal design condition in order to reduce risk of failure and speed up time to market. Worked on electrical variability which relates to Synthesis, Optimisation, On-chip variation effect in Static Timing Analysis (STA) and Statistical STA for deep sub-micron designs (45nm and below).

Apr 2009 - Feb 2010

Senior Design Methodology Engineer

Nxp Semiconductors

Worked on Design Flow Automation and Static Timing Analysis activities. Migrated the timing analysis flow from Synopsys Primetime to Cadence ETS.Was heavily involved in customer support.

Apr 2006 - Mar 2009

Design Methodology Engineer

Nxp Semiconductors

Worked on the architecture and implementation of a physical design flow automation system (RTL to GDS2) based on Cadence FMS

Mar 2005 - Mar 2006

Post Doctoral Researcher

Oxford Brookes University

Worked on an advanced electroimpedance tomography system for medical imaging

Sep 2002 - Jan 2005

Ecad Engineer

Technical University Of Sofia

Worked on digital design flow automation with Synopsys and Cadence Tools (RTL to GDS2 with Design Compiler and DFII)

May 1997 - Dec 1998

Compulsory National Service

Bulgarian Army

Pleven, Bulgaria

Mar 1996 - Mar 1997

Pcb Design Engineer

Galabov&Co.

Industrial Controls manufacturing

Sep 1995 - Mar 1996
Team & coworkers

Colleagues at Cirrus Logic

Other employees you can reach at cirrus.com. View company contacts for 1472 employees →

FL Frank Legeros Frank Legeros Colleague at Cirrus LogicSmithville, Texas, United States View → XC Xuekai Cao Xuekai Cao Colleague at Cirrus LogicShenzhen, Guangdong, China View → CL Crystal Levesque Crystal Levesque Colleague at Cirrus LogicAustin, Texas Metropolitan Area, United States View → RB Rod Boutwell Rod Boutwell Colleague at Cirrus LogicAustin, Texas, United States View → CC Christopher Crider Christopher Crider Colleague at Cirrus LogicCedar Park, Texas, United States View → JM John Melanson John Melanson Colleague at Cirrus LogicAustin, Texas, United States View → SV Sai Vaibhav Batchu Sai Vaibhav Batchu Colleague at Cirrus LogicAustin, Texas, United States View → JH John Hughes John Hughes Colleague at Cirrus LogicAustin, Texas, United States View → NJ Nino Jerome Lagatic Nino Jerome Lagatic Colleague at Cirrus LogicEdinburgh, Scotland, United Kingdom View → TL Torres Lu Torres Lu Colleague at Cirrus LogicNew Taipei City, Taiwan, Province Of China View →
3 education records

Dimitar Kavalov education

Phd, Electrical/Electronic Engineering

Oxford Brookes University

Activities and Societies: IEEE memberTopic/Title: Surface Acoustic Wave Neural Networks for RF Signal Processing Research expertise.

Gymnasium Diploma, Mathematics, Computer Science, Physics, Chemistry, Biology, Languages And Social Sciences.

Sofia School Of Mathematics
FAQ

Frequently asked questions about Dimitar Kavalov

Quick answers generated from the profile data available on this page.

What company does Dimitar Kavalov work for?

Dimitar Kavalov works for Cirrus Logic.

What is Dimitar Kavalov's role at Cirrus Logic?

Dimitar Kavalov is listed as System Evaluation Engineer at Cirrus Logic.

What is Dimitar Kavalov's email address?

AeroLeads has found 1 work email signal at @ieee.org for Dimitar Kavalov at Cirrus Logic.

Where is Dimitar Kavalov based?

Dimitar Kavalov is based in Woolton Hill, England, United Kingdom while working with Cirrus Logic.

What companies has Dimitar Kavalov worked for?

Dimitar Kavalov has worked for Cirrus Logic, Socionext Europe (Spin Off Of Fujitsu Semiconductors Europe), Fujitsu Semiconductor Europe (Fseu), Nxp Semiconductors, and Oxford Brookes University.

Who are Dimitar Kavalov's colleagues at Cirrus Logic?

Dimitar Kavalov's colleagues at Cirrus Logic include Frank Legeros, Xuekai Cao, Crystal Levesque, Rod Boutwell, and Christopher Crider.

How can I contact Dimitar Kavalov?

You can use AeroLeads to view verified contact signals for Dimitar Kavalov at Cirrus Logic, including work email, phone, and LinkedIn data when available.

What schools did Dimitar Kavalov attend?

Dimitar Kavalov holds Phd, Electrical/Electronic Engineering from Oxford Brookes University.

What skills is Dimitar Kavalov known for?

Dimitar Kavalov is listed with skills including Mixed Signal Design, 40Nm And 28Nm Back End Implenetation, Analogue Layout And Design Verification, Tcl, Mixed Signal, Static Timing Analysis, Physical Design, and Eda.

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