R&D - High speed / high current LED driversFPGA centric designs to bring in the next level high speed PWM algorithms into LED driversDMX / ArtNetArtNet over PoEPixel MappingEMC / EMI compliance, working closely with TUV test labs.

Concept design to mass production support for high volume customers.Edge AICamera / sensor module integration to edge AI platformsDepth camera integration to edge AI platformsLow power designsCustomer requirements capturingPRD feasibility studyCritical design reviews & analysisManaging contract manufacturers, debug, test and reporting to Director, Systems Design EngineeringProduct steering / technical committee member for new products

Managing and consulting design engineering teams around the globe in both hardware and software development. • Shelf-scanning autonomous robot for grocery store planogram compliance.• Custom planogram 3D store viewer.• Jetson nano driven AI handwashing station.• Multi-channel DMX lighting / Addresable SPI LED controller box with integrated Xilinx FPGA, Raspberry Pi Compute Module 4 & Quectel EC25 series GSM LTE Cat M1 module.• Wearable badge with BLE Nordic NRF52832/52840 for health care applications.• Remote Battery Management Systems (BMS) over the Cloud with GSM.• High power constant current LED driver with inbuilt safety features.• Robotic Navigation System with SLAM/LIDAR.• Remote Sensor Network Management over the Cloud.• Micro-four-thirds camera protocol stack.• Camera integration: MIPI, ISP, JPEG encoder, Area scan cameras, Line scan cameras, TOF cameras.• Raspberry Pi, Jetson Nano, Arduino, Nordic BLE & Particle GSM/Wi-Fi platforms-based hardware/firmware/software development.• UART, SPI, I2C, USB, RS485, CAN, Serial, SMBUS, PCI-E, I2S & MIPI hardware/firmware/software development.• GPIO & IRQ programming in user space and kernel space.• NFC, RFID, GSM 3G/4G LTE, Wi-Fi & Bluetooth integration to Jetson Nano, Raspberry Pi & Arduino development platforms.• CAN bus network systems and protocol development.• Xilinx FPGA and CPLD designs and programming in Verilog /ISE.• Linux, C, Python, Docker & Ubuntu.• SSH, VNC, Putty, PPP setup on embedded systems.• Digital, Analog, RF, Low Power, Low Noise, High-Speed circuit designs, from schematics to board bring up testing.• SRED (Scientific Research and Experimental Development) oriented research, development and documentation.• Hands on experience with hardware/software debugging/testing tools, oscilloscopes, digital and analog meters, signal generators and spectrum analyzers.

The SmartPoolSaver is an innovative, simple to use Smart Home system. It will reduce electricity consumption and can manage your natural gas utilization more efficiently. You can control your pool equipment from your smartphone or tablet.

1. Designed an Industrial high voltage pulser circuit with PCIe backend. The design comprises: - High voltage analog card - Digital card with isolation transformers, and Xilinx Kintex family FPGA to host the driver circuit logic - PCIe backplane with 4 lane configuration2. 3D stereoscopic camera system design with integrated ISP IP block and MIPI cameras. Total of 4 MIPI camera streams were combined with a TOF (Time of Flight) camera, to process the combined video stream inside Nvidia K1 APU.3. Lead hardware design engineer, overseeing the design aspects of the Almex’s ruggedized tablet design, supporting the outsourcing partners, suppliers and customers. http://almex.com/en/products-bat/200/almexpad-senior4. Designed the interface to integrate Telit GSM 2G/3G/4G radio modules to Free Scale IMX53 processor, running Android.5. Porting RIL (Radio Interface Layer) in Android for Telit GSM, supporting voice, text and Data.6. Designed the interface to integrate Upek Biometric module to Free Scale IMX53 processor and developed the drivers and ported them to Android.7. Designed an industrial grade display board using Xilinx CPLD, supporting SPI host communication interface.8. Designed an intelligent dual battery charger circuit for a ruggedized tablet running Android.9. Developed Linux drivers for a custom charger daemon to support dual battery charger architecture and ported to Android.10. Designed the interface to integrate Texas Instruments WL1271 Wi-Fi module to IMX53 processor and back ported its driver to Android 2.311. Designed a modular 3G/4G GSM daughter card with Telit GSM radio module.12. Designed a multi-node CAN bus communication system and developed drivers and API library for apps.13. Designed and integrated various prototype PCB cards to IMX53 processor, managing the layout, fab, assembly and testing phases of the project.14. Developed drivers for a temperature and humidity sensor and ported them to Android.

Supervised the Colombo Design Team with 10 design engineers.1. Designed the scan chain architecture for BL (Bit Line) & WL (Word Line) drivers for the TFT configuration SRAM. Proposed and implemented read while write scanning and pipe-lined the design with the FPGA main controller. (World’s first TFT based 3D FPGA architecture)2. Designed the configurable main controller of the FPGA. The controller supports slave SPI, JTAG, and master parallel configuration modes.3. USB JTAG programmer This module was developed to support TL development studio to configure the TL FPGA chip.The USB JTAG module was designed and developed to support both JTAG and custom SPI flash programming.4. TL Engineering board This board was developed to test the TL FPGA functionalities when released from the fab. The board has USB interface to communicate with a Host PC. Host PC would stream the configuration data and issue the commands to the inbuilt engine to stream the data to TL FPGA. Test board is completed and tested with TL 100 packaged parts, with 12 Layer card. The core engine which runs on a Xilinx FPGA was developed on ISE design studio with Verilog.5. I have put forward the following design proposals for the future generation of FPGAs.• Configurable controller for FPGAs instead of Hardwired/ASIC controller. This would enable the future FPGAs configuration controller and its interfaces to beconfigured – compared to modern FPGAs with controllers supporting fixed interfaces. • Encryption for Configuration Bit stream.6. Designed and developed algorithms/filters to identify and locate the failures - FA (Failure Analysis) of the 3D TFT memory array. All the failure modes suspected were analyzed on the real packaged parts (chips) and the identified failures along with their coordinates were sent to the FAB for further FA process.

Chief Engineer, managing Colombo operations with 12 engineers.Research & Development Areas:1. Military grade PDA running Linux/QTDesigning and building a manufacturing prototype of a PDA (Personal Digital Assistant) with MIL specifications. The Project was handled from the design & schematics capture stage to debugging & testing the prototype boards, with following features :- Mips32 core - 400MHz AMD AU1100 micro-controller.- 128MB SDRAM / 128MB FLASH.- 4.3” 480x272 TFT LCD with touch screen – 18bit color.- SD, USB 1.1, Ethernet, CF interfaces.- Bluetooth, WiFi 802.11 b/g, GSM, GPS, GPRS.- Embedded FPGA based voice & data crypto.- Integrated Biometric finger-print sensor module.- Integrated Digital Compass module.- Integrated USB Camera module.2. GSM encryption3. USB Data crypto

1. Etherchip project : ePDA Etherchip is a low cost embedded solution bringing the internet based Personnel Information Management (PIM) functionality to interactive appliances and other devices that are traditionally used for computing and/or for communications. ePDA is a reference design for a real-time PDA that is built on Mediasolv’s Etherchip technology that uses Bluetooth for real time connectivity. - World’s First Bluetooth enabled, Linux, ARM based PDA prototype. - ARM7TDMI AT93M63200 ATMEL microprocessor.- Graphics LCD module.- Integrated Casira BC-01 Bluetooth module.- Developed device drivers for LCD, Keyboard, buzzer, RTC (Real Time Clock) and power daemon.- Designed and implemented GUI layer and Image Viewer utility program.- Participated and lead the initial hardware bring-up and testing phases for all the ePDA revisions.2. sKEY : Letter-wise text predictorDesigned and implemented a letter-wise text predictor for hand held devices.Proposed a self learning algorithm to be imposed on the basic predictor module.