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Dinesh Pandichellam Email & Phone Number

Staff Product and Test Engineer at MaxLinear
Location: Singapore 5 work roles 2 schools
1 work email found @qualcomm.com LinkedIn matched
✓ Verified Jul 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email

Work email d****@qualcomm.com
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Current company
Role
Staff Product and Test Engineer
Location
Singapore
Company size

Who is Dinesh Pandichellam? Overview

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Quick answer

Dinesh Pandichellam is listed as Staff Product and Test Engineer at MaxLinear, a with 889 employees, based in Singapore. AeroLeads shows a work email signal at qualcomm.com and a matched LinkedIn profile for Dinesh Pandichellam.

Dinesh Pandichellam previously worked as Staff Product and Test Engineer at Marvell Technology and Senior Product and Test Engineer at Qualcomm. Dinesh Pandichellam holds Master Of Science - Ms, Electrical And Computer Engineering from National University Of Singapore.

Company email context

Email format at MaxLinear

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{first_initial}{last}@qualcomm.com
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Profile bio

About Dinesh Pandichellam

Silicon Product and Test Engineer with close to 10 years of experience in Product and Test Development. Expertise in v93K platform in creating test programs and debugging test methodologies both in SMT7 and SMT8 versions. Recognized with multiple awards for my contribution in commercializing new products into mass production.

Listed skills include Ic Design, Semiconductors, C, C++, and 13 others.

Current workplace

Dinesh Pandichellam's current company

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MaxLinear
Maxlinear
Staff Product and Test Engineer
carlsbad, california, united states
Website
Employees
889
AeroLeads page
5 roles

Dinesh Pandichellam work experience

A career timeline built from the work history available for this profile.

Staff Product And Test Engineer

Current

Singapore

►Responsible for managing all stages of a product enablement from NPI stage to volume ramp-up for Digital and RF SOCs including defining the test characterization plan, reliability plan and production plan, etc.,►Expertise in SCAN, MBIST, MEM REPAIR, EFUSE, RELIABILITY TESTING, DC, Power Characterization and Parametric Tests.►Highly involved and Driven reliability testing procedures such as ESD, Latchup, Package Qual and HTOL by defining the ATE test requirements, pre and post stress analysis and debug.►Driven multiple cost savings initiatives such as Test Time reduction and Yield improvement at both Wafer Sort and Final Test Stage to meet the company’s financial goals.►Experienced in using tools such as Exensio and Dataconductor to analyze the production and engineering test data and generate reports.►Played a pivotal role in ensuring customer satisfaction by providing robust support for return verification procedures by performing multiple root cause analysis of internal failures and customer returns.►Demonstrated leadership qualities through frequent interaction with Design, DFT, System validation and foundry teams to align and implement the best solutions for ensuring product quality and cost.

Dec 2022 - Present

Staff Product And Test Engineer

Singapore

►Experienced in managing production test programs at various manufacturing sites by supporting new product qualification and transfer.►Experienced in developing production and characterization ATE test programs that mainly includes Power characterization, SCAN, TDF, MBIST, MEM REPAIR, EFUSE, SERDES (PCIe & ETHERNET), DDR and DC Parametric tests.►Conducted test time savings initiatives by bringing up multi-site hardware for one of the 5G products to support volume ramp-up.►Achieved Test Time savings of ~25% across insertions in production to meet company goals.►Driving yield improvement by identifying/root cause the failures through analysing the existing production data available and silicon debug.

Dec 2020 - Dec 2022

Senior Product And Test Engineer

Singapore

►Experienced in characterization plan development, first silicon debug, process experiment (split) characterization, multiple-source fab matching, power characterization, data analysis, product documentation/presentation, test limit (guard band) generation, driving failure analysis to completion and yield variance control.►Achieved 15 to 20% percent power savings by spearheading the Product, System and Software teams.►Conducted Cost Savings initiatives by implementing new Test methodologies (using C/C++ in SMT-7 and using JAVA in SMT-8) in v93K platform which has greatly reduced the test time by ~25% in production.►Achieved 90% of manual work week savings by creating multiple VBA and Python scripts to automate data processing that generated results with very good accuracy. ►Experienced in powerful statistical tools such as JMP, Exensio, DataPower, Spotfire and O+ which were used for data crunching, data analysis, generating DOE plots and reports.

Dec 2018 - Dec 2020

Product And Test Engineer

Singapore

►Successfully led complete characterization efforts and testing plans on multiple NPI projects from pre-silicon to mass production by having close interaction with cross-functional teams.►Experienced in using collaboration tools such as GIT, SVN and JIRA.►Experienced in software skills (Java, C/C++, VB, Perl, Python) for programming and debugging test codes.

Jan 2016 - Dec 2018

Product Test Engineer Intern

Singapore

►Mainly involved in HTOL reliability testing and post-stress analysis of the functional and parametric data. Identified the root cause of the potential failure cases and took relevant actions to prevent the failure mode.► 90% manual workweek savings by developing more than 5 automation scripts for the Product Engineering team.► Involved in the collection and analysis of test data using statistical tools such as DataPower and O+.

Jun 2015 - Jan 2016
Team & coworkers

Colleagues at MaxLinear

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2 education records

Dinesh Pandichellam education

Master Of Science - Ms, Electrical And Computer Engineering

Activities and Societies: Graduate Student's SocietyBelow are the Core Modules that I had completed during my Master’s Degree.

Bachelor Of Engineering - Be, Electrical And Electronics Engineering, First Class With Distinction.

Activities and Societies: Member of Institute of Engineers, National Service Scheme, QUEST team.●Graduated with "First Class.

FAQ

Frequently asked questions about Dinesh Pandichellam

Quick answers generated from the profile data available on this page.

What company does Dinesh Pandichellam work for?

Dinesh Pandichellam works for MaxLinear.

What is Dinesh Pandichellam's role at MaxLinear?

Dinesh Pandichellam is listed as Staff Product and Test Engineer at MaxLinear.

What is Dinesh Pandichellam's email address?

AeroLeads has found 1 work email signal at @qualcomm.com for Dinesh Pandichellam at MaxLinear.

Where is Dinesh Pandichellam based?

Dinesh Pandichellam is based in Singapore while working with MaxLinear.

What companies has Dinesh Pandichellam worked for?

Dinesh Pandichellam has worked for Maxlinear, Marvell Technology, and Qualcomm.

Who are Dinesh Pandichellam's colleagues at MaxLinear?

Dinesh Pandichellam's colleagues at MaxLinear include Alfred Mah Soon Voon, Andrew Ogden, Melissa Glisson, Sweta ., and K Venkatesh Upadhyaya.

How can I contact Dinesh Pandichellam?

You can use AeroLeads to view verified contact signals for Dinesh Pandichellam at MaxLinear, including work email, phone, and LinkedIn data when available.

What schools did Dinesh Pandichellam attend?

Dinesh Pandichellam holds Master Of Science - Ms, Electrical And Computer Engineering from National University Of Singapore.

What skills is Dinesh Pandichellam known for?

Dinesh Pandichellam is listed with skills including Ic Design, Semiconductors, C, C++, Autocad Electrical, Revit Mep, Industrial Automation, and Plc Programming.

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