Dipayan Paul Email & Phone Number
@bronco.ai
2 phones found area 925
LinkedIn matched
Who is Dipayan Paul? Overview
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Dipayan Paul is listed as Founding Silicon Engineer at Bronco AI, a company with 6 employees, based in Burlingame, California, United States. AeroLeads shows a work email signal at bronco.ai, phone signal with area code 925, and a matched LinkedIn profile for Dipayan Paul.
Dipayan Paul previously worked as Design Verification Engineer at Apple and Sr. ASIC Design Verification Engineer at Ouster. Dipayan Paul holds Ms, Electrical Engineering (Dsp) from Santa Clara University.
Email format at Bronco AI
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AeroLeads found 1 current-domain work email signal for Dipayan Paul. Compare company email patterns before reaching out.
About Dipayan Paul
Experienced Digital Design Engineer with experience in the digital communications industry, having worked in Wi-Fi and mobile LTE & 5G projects. I have a solid background in DSP & Communications and a skillset needed for hardware design and verification.
Listed skills include Matlab, Python, Data Analysis, Asic, and 30 others.
Dipayan Paul's current company
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Dipayan Paul work experience
A career timeline built from the work history available for this profile.
Sr. Asic Design Verification Engineer
- Led Design Verification effort for ASIC in LiDAR sensor and worked with multiple vendor contractors to reach tape-out ready ASIC- Created in-house UVM verification environment allowing regression analysis and functional coverage collection & libraries for use on future projects- Caught bugs in post-synthesis netlist and worked with backend design vendor.
Digital Design Engineer
- 5G NR PHY Modem Algorithm & Microarchitecture development & optimization in Rx datapath (PDSCH)- RTL Design & Verification of modem block- and submodule-level and subsequent re-design/re-architect as per ASIC and FPGA specifications- Design Verification in Co-simulation verification environment & debugging in both reference model & RTL- FPGA synthesis &.
Hardware Engineer - Ic Design & Design Verification
- Design Verification: 1) Regression analysis, 2)Debugging of test failures, 3) Test creation & modification for tcl-based simulation environment- Worked on creation of FPGA simulation environment - created FPGA counterpart to RTL simulation- Chip Project Infrastructure: Initial chip project migration, git repository set-up and maintenance, chip-level and.
Hardware Engineering Intern
- Lab Bringup & FA Debug: Run diagnostics, verify chip characteristics on bench (such as power consumption and other performance metrics), Debug FA parts from customers- Design Verification: Regression analysis, Debugging of test failures, including resimulation and waveform analysis- Integration of design blocks into new SoC projects
Rf Hardware Engineering Intern
- RF characterization & evaluation of WLAN PCB boards- Work with system, chip, and other teams involved in bringup of new chips & board designs- Conduct experiments to optimize board designs- Troubleshoot and debug testing and hardware issues
Student Research Associate
- Conducted research in prostate HDR brachytherapy treatment planning- Developed mathematical optimization models using code written in Matlab and C++- Tested model with patient data (DICOM format) from clinic treatment computers
Summer Student Researcher
- Participated in research in HDR brachytherapy treatment planning at UCSF Department of Radiation Oncology- Presented research poster to fellow students and professors involved in the program at a symposium
Undergraduate Student Instructor General Biology Laboratory Class
BerkeleyNominated and selected to help students during labs with techniques and understanding of conceptsDesigned practice questions for students and assisted in lectureAttended lectures and weekly TA meetings; Helped proctor examinations; Prepared lab practical exam
Junior Volunteer, Gi Department
- Cleaned and stocked rooms; Transported specimens for lab analysis- Helped with patients (ran errands, transported scopes for procedures)
Dipayan Paul education
Ms, Electrical Engineering (Dsp)
Bachelor Of Science, Bioengineering Emphasis In Imaging
Frequently asked questions about Dipayan Paul
Quick answers generated from the profile data available on this page.
What company does Dipayan Paul work for?
Dipayan Paul works for Bronco AI.
What is Dipayan Paul's role at Bronco AI?
Dipayan Paul is listed as Founding Silicon Engineer at Bronco AI.
What is Dipayan Paul's email address?
AeroLeads has found 1 work email signal at @bronco.ai for Dipayan Paul at Bronco AI.
What is Dipayan Paul's phone number?
AeroLeads has found 2 phone signal(s) with area code 925 for Dipayan Paul at Bronco AI.
Where is Dipayan Paul based?
Dipayan Paul is based in Burlingame, California, United States while working with Bronco AI.
What companies has Dipayan Paul worked for?
Dipayan Paul has worked for Bronco Ai, Apple, Ouster, Intel Corporation, and Broadcom Limited.
How can I contact Dipayan Paul?
You can use AeroLeads to view verified contact signals for Dipayan Paul at Bronco AI, including work email, phone, and LinkedIn data when available.
What schools did Dipayan Paul attend?
Dipayan Paul holds Ms, Electrical Engineering (Dsp) from Santa Clara University.
What skills is Dipayan Paul known for?
Dipayan Paul is listed with skills including Matlab, Python, Data Analysis, Asic, Field Programmable Gate Arrays, Debugging, Simulations, and Biomedical Engineering.
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