Dmitry Gusev Email & Phone Number

Saint Petersburg, Russian Federation

Involved to the design and development of the newest post Cortex-A53 CPUs

Saint Petersburg, Russian Federation

Embedded CPU.Senior contributor to architecture exploration and microarchitecture design of reconfigurable and low power processing unit for embedded applications. Provided microarchitecture design for the major architectural features such as execution flow; system level architecture (IRQ/Exception handling; Debug facilities and etc.); and configurability. Owned the significant part of the source code (VHDL/System Verilog). Contributed to the testing and verification processes. Provided customers support at different levels starting with the design and implementation of the customer required features; performance tuning; integration of the developed CPU to the customer’s SoC design and providing integral testing; and finished by supporting physical design with the design characterization and timing/area/power optimization.

Saint Petersburg, Russian Federation

Programmable Accelerators. Wireless Communication. Image Processing.A part of the team developed highly parallel programmable DSP accelerator and successfully ported the corresponding parts of WiFi and WiMAX protocols on it. Familiarization with IP development flow and active participation at all stages including microarchitecture design; code writing (VHDL/Verilog); testing and verification; algorithms porting (microcode writing); design optimization by area and power; and documentation. Led FPGA-based prototyping and real-time demo activities targeted to demonstrate the architecture advantages. Developed multiprocessor SoC design based on Altera’s SOPC Builder tool and Nios II microcontrollers. Defined the scope of required IPs and integrated them into the system. FPGA and demo bring up including work with the measurement equipment like oscilloscope; frequency analyzer; logic analyzer; signal-vector generators and etc.

Nizhny Novgorod Region, Russian Federation

Algorithm Research. Wireless Communications.Familiarization with PHY and MAC layers of modern communication standards: WiFi (802.11a,b); 3GPP/EGPRS; WiWAX (802.16e); Piconet (802.15.3). Deep dive to DSP area and hands on experience in algorithms development and implementation for different receive chains including demodulation technics; channel estimation; time and frequency synchronizations; and etc. Participation in e2e application development (C, MSVS 6.0) for 3GPP/EGPRS including implementation of DSP blocks (GMSK demodulator based on Viterbi algorithm; multipath propagation channel models in correspondence to 3GPP TR 25.943); testing and subversion control.