Dmitry Krasnobrov Email and Phone Number
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- Expeirenced digital/mixed-signal chip design- Project leader in more than 7 IC projects- Leader of digital IC design team (frontend, backend, FPGA designers, programmers)- DSP and RISC-V single and dual-core processor, mixed signal chip architect- Experienced user of Cadence design flow- digital RTL design and simulation- logical synthesis with DFT (ATPG, PMBIST, OPCG, BSCAN)- LEC- AMS and Spectre simulation- looking for 3-rd party IP and integration- SOW development- management of design team up to 25 persons
Байкал Электроникс
View- Website:
- baikalelectronics.ru
- Employees:
- 50
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Head Of Ic Design DepartmentБайкал Электроникс Oct 2023 - Present -
Team LeaderMilandr Jul 2012 - PresentMoscow, Russia- Dual core 1 GHz RISC-V processor with extended periphery (chief designer)- Dual core 1 GHz DSP processor with extended periphery (chief designer)- DSP processor (analog of AD TS201S) (chief designer)- DSP processor with extended periphery (chief designer)- DVI receiver (chief designer)- Capacity-meter (digital designer)- Acoustic range noise generator (chief designer) -
EngineerFreescale Semiconductor Apr 2008 - Jul 2012Analog Mixed Signal and Power Division- High Speed CAN 8-pin single chip (digital part)Quality Group (PDK responsibility)- Participating in Process Design Kit (PDK) validation;- Improving PDK validation flow;- Design and deployment of new and enhancement of existing business processes for improving quality of a product;Test Vehicle Group:- Design of Verilog RTL and synthesis of standard cells blocks, ring oscillators, padring and top-level chip on 65nm, 45nm technologies; -
System ArchitectLebedev Institute Of The Precise Mechanic And Computing Electronic Ras Nov 2006 - Apr 2008- Analyze of the solutions for digital TV;- Development of the specification for the STB chip;- STB-chip architecture design;- Design of the hierarchy and parameters of communication medium for STB-chip;- Marketing of the IP blocks;- IP blocks input control;- Development of the STB-chip verification strategy;- VHDL design, verification and FPGA – prototyping of the communication (AMBA 2.0 AHB, APB, AXI) and periphery (I2S-controller with DMA) blocks;- Scripts for Synopsys DC development, synthesis and netlist verification;- Working using JIRA-Work Control System;
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Leading EngineerIdm Nov 1998 - Nov 2006Architecture and RTL design of parameterized NetworkOnChipSome blocks fro MPEG-2 and H.264 RTL design and FPGA prototypingIP design and verification (SDRAM, PCI controller)
Dmitry Krasnobrov Skills
Frequently Asked Questions about Dmitry Krasnobrov
What company does Dmitry Krasnobrov work for?
Dmitry Krasnobrov works for Байкал Электроникс
What is Dmitry Krasnobrov's role at the current company?
Dmitry Krasnobrov's current role is Head of digital IC design department.
What is Dmitry Krasnobrov's email address?
Dmitry Krasnobrov's email address is dm****@****bler.ru
What skills is Dmitry Krasnobrov known for?
Dmitry Krasnobrov has skills like Integrated Circuit Design, Soc, Ic, Semiconductors, Cmos, Mixed Signal, Digital Signal Processors, Functional Verification, Cadence Virtuoso, Drc, Physical Design, Lvs.
Who are Dmitry Krasnobrov's colleagues?
Dmitry Krasnobrov's colleagues are Anton Litov, Pavel Bakaev, Vasily Rudyaev, Ilya Denisov, Evgeniy Sudnev, Андрей Ивлев, Alexander Mikheev.
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