Dmitry Suponnikov Email & Phone Number

- Project management, organization of development workflow- Technological recommendations and documents- Clean rooms construction, setting up and operation- Technological process development (equipment, materials, environment, assembling) - DSP (architecture development, system perfomance estimation)- FPGA (architecture design, firmware (Verilog, SystemVerilog for test-benches, TCL) )- PLC (ST language; TIA, TwinCAT, CODESYS)- Design of high speed electronic circuits- Mixed design (Analog + Digital)- Acquiring data from CCD and CMOS area sensors- Estimation of performance of the optical systems- Deep experience with different types of CPUs, DSPs- Simulation and mathematical software tools (PSPICE, HyperLynx, Octave/MatLab)- Basics of SDR- Familiar with the most popular PC interfaces: USB, Ethernet- Experience of development the standard protocols' driven hardware: -- USB: Mass Storage Class, VCP, USB3 Vision, Proprietary protocols -- Ethernet: GigE Vision, EtherCAT, PROFINET -- Image Transfer protocols: CoaXPress, CSI-2Particularly: CCD sensors: SONY ICX249, ICX215; DALSA FTF5033/4027; Kodak KAF-16803, etc.;DFE: Altera Apex, Cyclone II/IV/V, Aria; DDR2/3 memory; CY68013, NET2270, FX3;AFE: AD8007, AD9824, AD5441, AD9970;DSP: AD BlackFin, 218x, 219x and SHARC;MCU: Atmel AVR, STM ARM; TI MSP430, DS 51- family;Ethernet: STM32 MAC, Intel FPGA MAC Core, Hilscher NETX52 ASIC;Other: FPGA hardware for LED displays (conventional and memory-based drivers, HDMI data capture).

Listed skills include Digital Signal Processors, Verilog, C++, Fpga, and 21 others.