Douglas Saylor Email & Phone Number

Santa Clara, Ca, Us

Leading a research team exploring machine learning and applied artificial intelligence.

Santa Clara, Ca, Us

Principal Architect of Compilers and Development tools.Team lead, Tegra ARM compiler: Implementing optimizations and functionality for new architectures with LLVM and GCC ARM compilers.Team Lead for Optimization: Implementing global, local, and profile-guided optimizations coupled with machine learning. Instrumental in design of Agile project management methods used for the entire compiler organization.One of the primary architects of the driver compiler ABI.Founding member of the PTX standards committee. Principal CUDA compiler architect

Austin, Texas, Us

The principal games compiler architect for PowerPC, MIPS, and ARM leading a geographically diverse team. Designed new state of the art inter-procedural alias analysis for all new Freescale compilers. Prototyped in LISP, implementing in C++. Designed and Implemented the Freescale's Playstation 3 and PSP compilers. Implemented the PowerPC based Nintendo Wii and GAMECUBE compilers. Designed and implemented the PowerPC compiler's SIMD language extensions. Enhanced all aspects of compiler technology including instruction selection, scalar optimizations, alias analysis, and run-time math and OS libraries. The Wii and GAMECUBE compilers ship with the Nintendo developer kit and are also used in-house to develop the respective operating systems. Re-architected the 64bit intrinsic math for the Mac OS and embedded compilers yielding substantial performance gains. Authored the original E500 Compiler, Embedded Application Binary Interface (EABI) and Programming Interface Model (PIM). Re-architected the Sony PlayStation 2 MIPS compiler, greatly improving alias analysis, peephole optimization, value numbering, copy propagation, and the GCC inline assembler compatibility. Implemented new processes and standards that led to a sharp reduction in the number of defects released to production, as well as the largest reduction in outstanding defects in the history of the team.Designed the Farscape compiler architecture for Nintendo and Sony game compilers - became the default compiler architecture for many Freescale compiler.

Us

Chicago, Illinois, Us

Designed real-time embedded operating systems for new seismic analysis hardware. Assisted in design of digital circuitry including CPU glue logic, memory, communication, and mass storage interfaces. Developed Windows and Linux software to analyze seismic data. Designed and mathematically modeled custom digital filters, compression, encryption, communication, and operating system scheduler using Maple and Mathematica. Represented LarCor at trade shows to present latest developments.

Designed and implemented compilers and assemblers for several embedded processors. Designed, prototyped, and debugged software and hardware for the Everlert-II and GPS-3 Seismographs. Designed and implemented communications protocols for internal multiprocessor and external cellular communications. Designed, mathematically modeled, and implemented custom digital filters, encryption, and compression algorithms for real-time data. Developed the premier software for analysis of seismic data hosted on Windows, and Linux. This software was adapted worldwide and remains in use today. Worked on internal development tools including new assemblers and compilers targeting Microchip and Z80 derivative processors. Developed microprocessor simulators for Microchip embedded processors. Developed custom embedded operating systems for Z80 and Microchip microprocessors. Mathematically modeled all thermodynamic and fluid flow systems for the wave-guide controller.

Designed automation tools for custom electronic design.Designed macro assemblers for embedded processors such as the HD64180, Z80, and 6502.