Experienced software engineer with expertise in high-performance applications, memory modeling, and embedded systems. Proficient in using C, C++11/14/17, Verilog HDL, Python, Perl, TCL and Shell (Bash/Csh/Ksh). Skilled in using IDEs and development tools like Visual Studio, Gvim/Vim, Eclipse, and Git, Perforce, Clearcase for code management. Adept at debugging and profiling with GNU GDB, Gcov, Purify and Valgrind. Efficient on Linux, Windows, and MAC OS. Familiar with Agile and Waterfall SDLCs.At Morgan Stanley (FinTech), played a key role in enhancing features of their flagship Sales and Trading Application, focusing on achieving low-latency execution through performance optimizations. Successfully migrated projects to utilize modern libraries, resulting in improved coding practices and reduced latency. Led the deployment of high-performance versions of sales, trading, and order management tools. Contributed to infrastructure automation using Jenkins pipeline and other scripts.As a Software Development Consultant at SiriusXM (Satellite Radio), worked on debugging and improving middleware libraries of a multiplatform radio application, collaborating with the escalation team to address issues on Linux and Windows platforms. Developed client interface APIs using network protocols like TCP/IP and provided constructive feedback during code reviews.As Lead Software Engineer at Cadence Design Systems (EDA) in DFT-PMBIST R&D team, implemented and acted as Subject Matter Expect on memory modeling in the CTL (Core Test Language), enhancing the Genus (Synthesis) tool. Led various projects, collaborating with customers, memory provider companies, and cross-functional teams to deliver high-quality test software solutions. Mentored junior team members, wrote technical documents and created thousands of unit/In-system tests. Involved in recruitment activities. My work encompassed technologies like Design for Test (DFT), MBIST, Built-in Self-Repair, SOCs, Synthesis Genus), ATPG (Modus), and Simulation (NCSIM). Also at Cadence as a consultant, got a chance to work on Formal Verification of designs for 2 years.I hold a Bachelor's degree and a three-year Diploma in Electronics and Communication Engineering. Member of the Working Group to upgrade the IEEE standard 1450.6.2 for memory modeling and a member of the Board of Studies for the Electrical and Electronics Department at Lovely Professional University. Did a PG Certification in VLSI Design-Front End and also completed an internship on National Long-Distance Switching and Routing.Connect to know more.