Altavion-NexStamp develops and markets novel technologies for creating Self-Authenticated Documents, validating them, Secure Document Routing, Novel Time Stamping, Dynamic Handwritten Signature Verification, Pixel-Level Encryption Technology, and Prevention and Detection of Documents' Forgeries. All these technologies are uniquely used in creating Attestation Services.

Co-Founded Quintet and lead the development of its novel technologies and intellectual properties for: Dynamic Handwritten Signature Verification, Multi-level authentication, and Anti-Spoofing.

Created a design automation department and integrated tools in support of Analog and Mixed signal designs and various wafer fab processes, transistor models, standard libraries of components, in addition to training chip designers to help the transition to a more productive environment.

In charge of P&L center for S/W development, Sales & Marketing. Have a large staff in Tokyo Japan developing Special Graph based database called RicohBase and very sophisticated 3D solid modeler called DesignBase.

Created a department to take care of a large number of analogue and digital silicon designers. Purchased mainframe computer and tools for all kinds of design cycle activities including testing. Integrated tools developed by the flag ship of the company research center STL, Maintained, modified, and supported a huge number of internally developed tools including Layout, logic simulators, timing analyzers, linear simulator, layout versus schematic. Developed tools to optimize digital designs through investigating digital simulation results. Interfaced with external vendors such as Silverlisco, phoenix designs, ECAD, Hspice...

I developed the first 2 D automatic layout system for the Gate Array. Integrated all the tools around a design flow. Took care of the Logic Simulator, the Standard Cell layout including mask development and pattern generation. trained other engineers. Designed automatic layout systems for gate arrays as part of my PhD submission and Standard cells. Create the Company's first tool integration shell which became the trend in industry. Worked with other designers in winning large mixed signal IC designs from large clients in Sweden.

Worked on research leading to PhD responsible for a research work on design automation of microchip in CMOS and ECL Mixed mode design technology. I shared developing a first circuit simulator NOTRAN which proved to be more robust and much faster than Spice. Then worked on the layout of LSI and followed by VLSI onto Gate-Arrays. The resulting system was the first of its kind to make use of rule-based designs. Rules were introduced through careful analysis of professional manual design styles of expert layout designers. The work was conducted under the joint supervision of Allen Clark Research Center of the Plessey, and then Marconi electronic Devices Ltd. Many designs were successfully conducted by the system on the first UK5000 ULA system. The system became the base system for developing layout system for STC and STL (Standard Telecom labs) of the then giant ITT.

Teaching and tutoring duties in the Department of Engineering Mathematics and Physics.