Who is Mark Rollins, Ph.D.? Overview
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Mark Rollins, Ph.D. is listed as Sr. Manager Technical Marketing at AMD, based in Ottawa, Ontario, Canada. AeroLeads shows a matched LinkedIn profile for Mark Rollins, Ph.D..
Mark Rollins, Ph.D. previously worked as Researcher, RF Technology at Ericsson and Principal Engineer at Ciena. Mark Rollins, Ph.D. holds Phd, Wireless, Equalization from Queen'S University.
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About Mark Rollins, Ph.D.
Technical leadership in the definition and development of sophisticated world-class products employing DSP technology in software or silicon.Conception, design & optimization of DSP algorithms using Simulink, Matlab, and C++ for wide-ranging applications.Implementation of DSP algorithms from software to silicon, including embedded CPU, FPGA, ACAP and ASIC. Design entry using Vivado HLS, Catapult-C, Simulink, C/C++, Verilog, and assembly languages.
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Mark Rollins, Ph.D. work experience
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Researcher, Rf Technology
DSP algorithm design for concurrent multi-band digital predistortion of 4G/5G power amplifiers.Algorithm research for crest factor reduction in Massive MIMO 5G systems.Vectorization of algorithms for massively parallel implementation on Xilinx Versal ACAP devices.Intellectual property generated 9 granted US patents.
Principal Engineer
DSP algorithm development for 100 and 40 Gbps optical transceivers, including clock recovery, CD/PMD/PDL compensation and adaptation/tracking, and framing synchronization. Intellectual property generated three US patents granted.Architected alternative frequency-domain data path architectures to achieve ~ 50% reduction in gate area over existing schemes.
Sr. Dsp Fpga/Asic Designer
Architected & led design and development of a large FPGA for WiMAX channelization.Architected large (>1M gate) high performance ASIC blocks for WiMAX and LTE 4G modem & radio signal processing functions. Mentored the execution of the design by a junior engineer during development.Investigated physical layer performance of closed-loop MIMO features of 802.11n using Matlab simulations. Used results to steer WiFi chipset selection and evaluation of vendor roadmaps.Developed FPGA prototype of floating-point matrix inversion hardware for adaptive least squares tracking applications.
Sr. System Engineer
Performed digital RTL verification for mixed-signal SERDES chips for 10 Gbps Ethernet PHY applications. Created RTL behavioral models of analog datapath circuits to verify closed-loop system performance across core boundaries.Created system-level models in Matlab and C++ of electronic dispersion cancellation (EDC) algorithms for multi-mode fiber applications. Quantified and optimized overall system performance for various analog circuit implementations and design trade-offs. Algorithmic development resulted in one patent granted.
Sr. Modem Architect
Investigated optimized architectures and hardware partitionings for 2nd-generation cost-reduced base station channel cards. Architected and implemented a multi-channel high-capacity WCDMA-based path searcher in Xilinx FPGAs. Extended the features & usability of an in-house data capture and test-vector system for laboratory performance testing.
Sr. Manager
Established, staffed & managed the Ottawa Design Center, a remote field office of the parent company headquartered in San Jose, growing from 1 to 9 employees. Defined & implemented a core project to produce 3G wireless reference designs for the Chameleon reconfigurable platform. Delivered significant marketing collateral to customers including two booth-quality demos, reference designs, app-notes, white papers, and tutorials. Presented product-oriented technical training sessions to customers worldwide.Implemented Verilog-based designs on the Chameleon FPGA platform.Earned “Outstanding Effort Award” and “Technical Achievement Award” for the development of intellectual property resulting in three granted patents.
Member Of Scientific Staff
Developed algorithmic models of a discrete multi-tone ADSL modem and base station channelizer applications. Performed fixed-point analysis, SNR budgeting, and dynamic range optimization for DSP functions including FFT’s, automatic gain control (AGC), and equalization. Created Perl and Matlab scripts for automated ASIC regression testing & verification.Wrote an object-oriented simulator in C++ for the physical layer of the IS-95 cellular standard including convolutional coding, interleaving, channel propagation models, Rake receiver processing, diversity combining, and Viterbi decoding.Received three “Spot Awards” for technical leadership and teamwork.
Research Scientist
Conducted research on the application of digital beamforming to future broadband communication satellites employing on-board processing. Performed detailed simulations in both C++ and Matlab to demonstrate performance of algorithms.
Adjunct Instructor
Presented a 3rd year undergraduate course entitled "Microprocessor System Principles". Created lab assignments based on Motorola 68HC11 hardware.
Colleagues at AMD
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Reynard Blasa
Colleague at AmdAustin, Texas, United States
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Kumud Singh
Colleague at AmdUnited States
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Laura Damba
Colleague at AmdEngland, United Kingdom
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Suhail Abdella
Colleague at AmdGonder, Amhara Region, Ethiopia
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Vikram Singh
Colleague at AmdJabalpur, Madhya Pradesh, India
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Sathya Narayanan
Colleague at AmdPuducherry, India
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Rohit Bhelkar
Colleague at AmdSanta Clara, California, United States
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Chandra Babbu Chandra Babu
Colleague at AmdHyderabad, Telangana, India
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Zhuo Fei Liu
Colleague at AmdMarkham, Ontario, Canada
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Julian Bartolone
Colleague at AmdSunnyvale, California, United States
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Mark Rollins, Ph.D. education
Phd, Wireless, Equalization
Bsc, Elec Eng
Frequently asked questions about Mark Rollins, Ph.D.
Quick answers generated from the profile data available on this page.
What company does Mark Rollins, Ph.D. work for?
Mark Rollins, Ph.D. works for AMD.
What is Mark Rollins, Ph.D.'s role at AMD?
Mark Rollins, Ph.D. is listed as Sr. Manager Technical Marketing at AMD.
Where is Mark Rollins, Ph.D. based?
Mark Rollins, Ph.D. is based in Ottawa, Ontario, Canada while working with AMD.
What companies has Mark Rollins, Ph.D. worked for?
Mark Rollins, Ph.D. has worked for Amd, Ericsson, Ciena, Nortel Networks, and Macom (Formerly Amcc Via Quake Technologies).
Who are Mark Rollins, Ph.D.'s colleagues at AMD?
Mark Rollins, Ph.D.'s colleagues at AMD include Reynard Blasa, Kumud Singh, Laura Damba, Suhail Abdella, and Vikram Singh.
How can I contact Mark Rollins, Ph.D.?
You can use AeroLeads to view verified contact signals for Mark Rollins, Ph.D. at AMD, including work email, phone, and LinkedIn data when available.
What schools did Mark Rollins, Ph.D. attend?
Mark Rollins, Ph.D. holds Phd, Wireless, Equalization from Queen'S University.
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