Khasim Dudekula Email & Phone Number
@facebook.com
7 phones found area 408, 650, 916, and 914
LinkedIn matched
Who is Khasim Dudekula? Overview
A concise factual answer block for searchers comparing this professional profile.
Khasim Dudekula is listed as Founder and CEO, Byte Veda Inc. at Neural Ads, a company with 3 employees, based in New York, New York, United States. AeroLeads shows a work email signal at facebook.com, phone signal with area code 408, 650, 916, 914, and a matched LinkedIn profile for Khasim Dudekula.
Khasim Dudekula previously worked as Founder and CEO at Byte Veda Inc. and Engineer at Meta. Khasim Dudekula holds Ms, Electrical Engineering from Clarkson University.
Email format at Neural Ads
This section adds company-level context without repeating Khasim Dudekula's masked contact details.
AeroLeads found 1 current-domain work email signal for Khasim Dudekula. Compare company email patterns before reaching out.
About Khasim Dudekula
Technical/Domain expertise - Deep Learning Algorithms and Applications, Cybersecurity, Computer Vision and Robotics, Communication Systems, Wired/Wireless Networking, Data Compression, Video Codecs, Camera and Display Systems, SoC and CPU Architectures.Products shipped:- Meta/Facebook: Deep Learning Accelerators for Datacenters- Qualcomm: Snapdragon 810, 820, 835, 845 (all are SoCs for Smartphones)- Intel: CPUs: Itanium and Itanium II Network Processor: IXP2400 Media SoCs: Vermilion Range (EP80578), CE3100, CE5300
Listed skills include Soc, Processors, Debugging, Verilog, and 45 others.
Khasim Dudekula's current company
Company context helps verify the profile and gives searchers a useful next step.
Khasim Dudekula work experience
A career timeline built from the work history available for this profile.
Founder And Ceo
Current
Engineer
Engineering Project Lead
Responsible for development of Architectural models of Camera Sub Systems for Snapdragon line of SoCs and ensure the IP makes it all the way to silicon by working with Design and Verification engineers, lead a team spread across geographies.Lead a small team of engineers to develop a real time scene classification system running on a mobile phone based on.
Sr Staff Engineer, Camera Systems Group
Staff Engineer, Camera Systems Group
Staff Systems Engineer, Intel Architecture Development Group
1. Media SoC Memory sub-system: delivered an architecture driven by performance studies, some of the problems addressed were how virtual memory design for media sub-systems would perform, finding suitable candidates for their TLB prefetch and replacement policies and analysis of cache sub-systems suitable for media processing systems.2. Broadcast.
Sr. Systems Engineer, Digital Home Group
Models for Video post-processing and Display: Hands on technical lead for a team of 6 Engineers working on modeling for Display Processing pipelines and Display controller models for Multimedia SOCs.Responsible for overall software architecture, resource estimates and schedule for development and delivery for our architecture and verification.
Sr. Component Design Engineer, Network Processor Division
Team Lead, IXP 2400 NPU SDK Transactor Architecture tools and their development.Developed cycle accurate simulator to model the entire functionality of the IXP2400 NPU.Also developed relevant tools to provide instruction execution latencies for multithreaded processors and also latencies of different subsystems in the NPU, these are critical in tuning a.
Sr. Component Design Engineer, Microprocessor Group
Responsible for MP (Multi-processor) Validation of the Itanium Processor and development of required tools and methodologies for a coverage based approach.Developed a Multiprocessor simulation platform environment for pre-silicon validation, this was used as the primary regression environment for validation of MP functionality, internal customers used this.
Component Design Engineer, Validation Technology Group
As part of a research team, invented several new algorithms for high speed cycle accurate simulation which were designed to run on a software or hardware implementation. Concepts used range from graph theory, synthesis, logic design and system architecture.
Summer Internship
Automation of VHDL System Simulator (VSS) tools for digital simulations in Design Verification Group.
Khasim Dudekula education
Ms, Electrical Engineering
Internship, Function Approximation Using Neural Networks
B.Tech, Electronics & Communication Engineering
Frequently asked questions about Khasim Dudekula
Quick answers generated from the profile data available on this page.
What company does Khasim Dudekula work for?
Khasim Dudekula works for Neural Ads.
What is Khasim Dudekula's role at Neural Ads?
Khasim Dudekula is listed as Founder and CEO, Byte Veda Inc. at Neural Ads.
What is Khasim Dudekula's email address?
AeroLeads has found 1 work email signal at @facebook.com for Khasim Dudekula at Neural Ads.
What is Khasim Dudekula's phone number?
AeroLeads has found 7 phone signal(s) with area code 408, 650, 916, 914 for Khasim Dudekula at Neural Ads.
Where is Khasim Dudekula based?
Khasim Dudekula is based in New York, New York, United States while working with Neural Ads.
What companies has Khasim Dudekula worked for?
Khasim Dudekula has worked for Neural Ads, Byte Veda Inc., Meta, Qualcomm Cdma Technologies, and Intel Corporation.
How can I contact Khasim Dudekula?
You can use AeroLeads to view verified contact signals for Khasim Dudekula at Neural Ads, including work email, phone, and LinkedIn data when available.
What schools did Khasim Dudekula attend?
Khasim Dudekula holds Ms, Electrical Engineering from Clarkson University.
What skills is Khasim Dudekula known for?
Khasim Dudekula is listed with skills including Soc, Processors, Debugging, Verilog, Asic, Firmware, Embedded Systems, and Microarchitecture.
Search by job title, company, industry, location, and seniority. Export verified B2B contact data when you need it.
Start free trial