Duncan Mackay

Duncan Mackay Email and Phone Number

Experienced customer-focused professional with track record of marketing & supporting software tools for digital hardware design and software acceleration
Duncan Mackay's Location
Portland, Oregon, United States, United States
About Duncan Mackay

Experienced semiconductor design professional with a track record of successfully supporting and advancing leading edge methodologies for ASIC and FPGA designs at multiple successful startups and in large complex organizations.Throughout my 20+ year career in IC/FPGA design and EDA application support, I have worked with leading edge customers to successfully proliferate the adoption of new methodologies, tools and technologies: starting with Design Compiler version 1.0.c I have been the lead AE for Behavioral Compiler (HLS), Power Compiler, PrimeTime, SLEC, PowerPro and Vivado HLS (the synthesis engine for Vitis ).As a top contributor, strong team member and team manager, my roles have included product specification and development, all aspects of customer support from pre-sales consultations through post-sales in-depth support, strategic partnerships, developing methodologies, creating complete documentation sets on different media, developing training, and leading global teams.

Duncan Mackay's Current Company Details

Experienced customer-focused professional with track record of marketing & supporting software tools for digital hardware design and software acceleration
Duncan Mackay Work Experience Details
  • Intel Corporation
    High Level Design Product Marketing Manager
    Intel Corporation Jan 2022 - Jun 2024
    Santa Clara, California, Us
    As Marketing manager for the High-Level Design products for FPGAs at Intel (Altera Division), I ensured that customers and partners had access to top-tier tools for implementing AI/ML, database, video and communication workloads on FPGAs .I engaged extensively with customers and internal sales to understand their needs and led cross-functional teams to develop go-to-market strategies, drive product vision, and create compelling content (white papers, success stories, videos) to promote and onboard customers.My product responsibilities included Intel oneAPI (HLS flow), Intel DSP Builder for Simulink block-based design, Intel P4 Suite for FPGA, Altera's cloud-based FPGA strategy, the Agilex FPGA DSP block, and numerous 5G and signal processing IPs.
  • Xilinx
    Product Management Manager
    Xilinx Jun 2021 - Dec 2021
    San Jose, Ca, Us
    Helped to ensure the applications team from Silexica was successfully integrated into the Xilinx environment.
  • Silexica
    Fae Lead
    Silexica Mar 2020 - Jun 2021
    Cologne, De
    As the FAE Lead, I managed and led a worldwide team of FAEs supporting Silexica products at customer sites on three continents. Working within the challenging covid-19 environment we Overcame travel restrictions to successfully engage with customers in multiple geographies , drive product development, and significantly grow our customer ecosystem. Silexica was acquired by Xilinx in Q2 2021.
  • None
    A Year Off
    None Oct 2018 - Mar 2020
    I moved house, and also took a year out. It was enjoyable, relaxing and enlightening. And good for my health.
  • Xilinx
    Manager Hls Sw Applications
    Xilinx Apr 2011 - Oct 2018
    Managing the application teams for Vivado HLS, SDAccel, System Generator and Model Composer. Ensured Xilinx customers can use Vivado HLS (High-Level Synthesis) to get to market faster with the Virtex, Kintex, UltraScale and Versal devices. Support the technology at the heart of the Xilinx SDAcccel (Data center, Acceleration, ML), SDSoC (Zynq Embedded ARM), Alveo (Accelerator Card) and Model Composer (Mathworks Simulink environment) products.Manage multi-site team to ensure customer feedback is incorporated in to new features, support leading edge customers, develop documentation and training, develop 1st-in-class IP solutions, mentor team members into being company/industry wide experts,
  • Xilinx
    Sr. Staff Product Applications Engineer
    Xilinx Jan 2011 - Apr 2011
  • Autoesl
    Principal Corprate Applications Engineer
    Autoesl Nov 2009 - Jan 2011
    Us
    Worked with multiple customers and ecosystem partners to show the benefits of HLS using AutoPilot. After multiple customer successes against industry leading tools, and demonstrating adoption at leading edge ASIC manufacturers and FPGA designers, AutoESL was acquired by Xilinx in Jan 2011. As with previous roles, and outlined below, I led the interaction with customers and created all customer facing documentation, training and customer escalation processes.
  • Calypto Design Systems
    Senior Member Of Consulting Staff
    Calypto Design Systems Nov 2004 - Nov 2009
    Wilsonville, Or, Us
    Drove the adoption of the SLEC (Sequetnial Logic Equivalence Checker) and PowerPro (power optimization) products. Supported leading edge customers, worked extensively with industry partnerships - Mentor Graphics CatapultC, Forte Design System (now Cadence) Cynthesizer - to develop design flows and on-going regression tests for our common C/C++ or SystemC customers. supported pre-sales, demo development/delivery, tradeshows, developed entire documentation and training set for both products.
  • Leopard Logic
    Senior Applications Consultant
    Leopard Logic Feb 2002 - Nov 2004
  • Adaptive Silicon
    Technical Marketing Engineer
    Adaptive Silicon Feb 2001 - Jan 2002
  • Synopsys
    Staff Corporate Applications Engineer
    Synopsys Oct 1996 - Feb 2001
    Sunnyvale, California, Us
    Primarily supported Behavioral Compiler (High-Level Systhesis) and SystemC compiler. Also supported Power Compiler. Primetime (static timing analysis) and recognized by multiple customers for the development of a solid methodology with documentation and training enhancements.Very early adopter of SystemC (I think I gave it it's name, it was Scenic).Supported customers, developed product specifications, pre-and-post sales support, developed demos, presented at tradeshows, contributed to documentation, developed application noted and guides.
  • Sharp Electronics
    Asic Design Consultant
    Sharp Electronics May 1991 - Oct 1996
    Montvale, Nj, Us
  • Gould Electronics
    Asic Design Engineer
    Gould Electronics Jul 1988 - May 1991
    Us

Duncan Mackay Skills

Eda Tcl Systemc Verilog Vhdl Static Timing Analysis Asic Fpga C C++ Simulation Linux Debugging Unix Shell Scripting Rtl Design Formal Verification Modelsim Hardware Design Xilinx Rtl Coding Digital Design Primetime Logic Synthesis Timing Closure Physical Design Soc Systemverilog Hardware Architecture Semiconductors Simulations Application Specific Integrated Circuits Field Programmable Gate Arrays

Duncan Mackay Education Details

  • University Of The West Of Scotland
    University Of The West Of Scotland
    Electrical And Electronics Engineering

Frequently Asked Questions about Duncan Mackay

What is Duncan Mackay's role at the current company?

Duncan Mackay's current role is Experienced customer-focused professional with track record of marketing & supporting software tools for digital hardware design and software acceleration.

What is Duncan Mackay's email address?

Duncan Mackay's email address is ma****@****ica.com

What schools did Duncan Mackay attend?

Duncan Mackay attended University Of The West Of Scotland.

What skills is Duncan Mackay known for?

Duncan Mackay has skills like Eda, Tcl, Systemc, Verilog, Vhdl, Static Timing Analysis, Asic, Fpga, C, C++, Simulation, Linux.

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