Rf Hardware Design Engineer
Served as primary hardware design engineer on re-design and production release of UHF Satcom system. Managed part selection and replacement, performed design updates, and debugged and revised 100W transmit amplifier subsystem.Performed Worst Case Circuit Analysis on RF chain of space payload program.Developed parasitic antenna array system using tuned reactive loads. Executed CST simulations and MATLAB processing of antenna range data to compare results to theory for model tuning.Designed 2W C-band upconverter front end module.