Edward Bryan Pineda Email & Phone Number

Muntinlupa City, National Capital Region, Philippines

•Test Pattern Development for FPGA IPs•Test Program Integration and Validation using Magnum ATE Tester.•Pattern Generation usjng ATPG.

Carmona, Calabarzon, Philippines

•Performs package and die-level analysis on the root cause of failures of IC devices from customer returns, qualification, reliability fall-outs and manufacturing fall-outs.•Determine and verify product failures. Determine the cause of the failure and how it can be prevented in the future. Product failures could be any non-conformance of the device to its electrical and/or visual/mechanical inspections.•Generate failure analysis reports and corrective actions as well as interfacing with various groups/cross-functional teams for the resolution of issues.•Products handled: Customer Application Specifics ICs (ASICs)

General Trias, Calabarzon, Philippines

•Performs package and die-level analysis on the root cause of failures of IC devices from customer returns, qualification, reliability fall-outs and manufacturing fall-outs.•Determine and verify product failures. Determine the cause of the failure and how it can be prevented in the future. Product failures could be any non-conformance of the device to its electrical and/or visual/mechanical inspections.•Creates NI Labview graphical programs for measurement automation in verifying product failures.•Generate failure analysis reports and corrective actions as well as interfacing with various groups/cross-functional teams for the resolution of issues.•Products handled: Digital-to-Analog (DAC) converters, Analog-to-Digital (ADC) converters, Micro-converters/controllers, Lens drivers, Cap-touch sensors.

Makati, National Capital Region, Philippines

•Perform circuit analysis and simulation. Main aim is to determine the block-by-block functionality of the IC. This can be verified by comparing simulations and hand calculations from data sheet specifications. •Handles Verilog-HDL modeling/programming for verifying both simulation and actual breadboarding of the design. Also handles Verilog-A modeling of specific block for faster simulation. •Perform Test Evaluation to verify functional characteristics of new design sample chips. •Performs worse-case simulations of ROHM ICs. The test device undergoes different process variations and stress conditions to determine its behavior. Simulations used are Cadence Spectre Stand-Alone and Ocean.•Creates scripts in UNIX, Ocean, and Spectre for automatic simulation, measurement and waveform plotting.•Perform Reverse Engineering of semiconductor ICs. This includes circuit extraction by physically mapping IC layout and afterwards translates into schematic diagrams to be used in circuit analysis. •Plans project schedule and communicate requesters in Japan.•Products handled: Op-amps, voltage regulators, power-management IC’s, dvd motor-driver IC’s

General Trias, Calabarzon, Philippines

Master Of Science, Electronics Engineering, 1.125

Bachelor Of Science, Electronics And Communications Engineering, 1.56

Cum Laude - Bachelor of Science, Electronics and Communications Engineering - Most Outstanding Student (Graduating) - College.

High School

- Special Academic Awardee - Mercury Drug Awardee for Excellence in Science and Mathematics - Adamson University Awardee for Excellence.

High School

Mathematician of the Year 8th Place MTAP - Individual Category

Grade School

First Honor Best in Math Best in Filipino