Hing-Mo Lam Email and Phone Number
Hing-Mo Lam work email
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Hing-Mo Lam personal email
- Ph.D. degree in emerging display technology and the research project is OLEDoS microdisplay.- 20+ years of experience in research of mixed-signal systems and integrated circuit design. - Hands-on experience in transistor-level, gate-level, RTL-level, synchronous and asynchronous digital circuit design.- Hands-on experience in mixed-signal system architecture design of AMOLED display driver, OLEDoS microdisplay, LED and OLED lighting, active stylus, quick charge standard identification IP, etc.- Hands-on experience in digital circuit design of complicated 5G and data compression algorithms.- Published 26 academic papers and filed 26 patents on AMOLED pixel circuit designs, AMOLED driving methods, OLEDoS microdisplay, SRAM, 5G, data compression, synchronous and asynchronous integrated circuit, etc., including 6 first-author journal papers, 6 first-author conference papers, and 18 first-inventor patents.- Skills: Verilog, RTL, ASIC, FPGA, Mixed-signal, OLED, VR, AR, Cadence, Synopsys, Hspice, etc.
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Principal Design EngineerOmnivisionCalifornia, United States -
Principal ArchitectGoertek Electronics Mar 2024 - PresentOLEDoS microdisplay - Architecture - Pixel circuit - Driving methodFiling 6 patents, including 5 first-inventor patents. -
Principal Design EngineerOmnivision Sep 2022 - Mar 2024Santa Clara, Ca, UsMicroLED microdisplay:Project leader for the microLED silicon backplane development, in charge of - pixel circuit design - silicon architecture - driving method - managing the projectLCoS:Help with design verification of LCoS project.Filing 4 patents, including 3 first-inventor patents covering microLED microdisplay dimming, driving, and microLED anode voltage detection method.
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Associate Principal EngineerAstri Dec 2018 - Jun 2022Hong Kong, Hong Kong, Hk- Led the development of FPGA acceleration card for 5G base station.- Led the ASIC implementation of the lossless data compression module for AI chips.- Filed 4 first-inventor patents, published 1 first-author conference paper and 1 first-author journal paper.First-inventor patents: 1. Parallel LDPC decoder, US10826529B2 (5G project) 2. Reconfigurable segmented scalable cyclic shifter, US10877729B2 (5G project) 3. Low Latency Segmented QC-LDPC Decoder. (Filed on 2021.07) (5G project) 4. Hardware implementation of low latency frequency table generation for Asymmetric Numeral System based data compression. (2022) (AI project)First-author papers: 1. "A High-Efficiency Segmented Reconfigurable Cyclic Shifter for 5G QC-LDPC Decoder", IEEE Transactions on Circuits and Systems I: Regular Papers · Oct 5, 2021 2. "Segmented Reconfigurable Cyclic Shifter for QC-LDPC Decoder", IEEE International Symposium on Circuits and Systems (ISCAS) · Apr 27, 2021 -
Senior EngineerAstri Oct 2017 - Dec 2018Hong Kong, Hong Kong, Hk
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Senior Ic Design EngineerAppotech Limited Oct 2015 - Oct 2017Hong Kong, Hong Kong, Hk- Led the development of the quick charge identification IP. - In charge of chip-level mixed-signal simulation of all-in-one blue-tooth IC.- Led the development of an in-house EDA tool to scan spice netlist for any misconnections of transistors to the wrong power domain, and to identify any floating nodes.- Worked on DDR3 PHY digital part circuit design for SSD controller IC.- Filed 5 patents, including 4 first-inventor patents.Award: Excellent patent work in 2016Filed 5 patents, including 4 first-inventor patents.First-inventor patents:1. A kind of current detection circuit and its method, chip and power-supply device. CN106771540A. 20162. A kind of current detecting chip, power-supply device and electronic equipment. CN106855588A. 20163. Multiport simulation method and device, memorizer, window processing module and electronic device. CN106681940B. 20164. Method for simulating multi-port and simulated multi-port memory. CN107123438B. 2017 -
Staff Hardware EngineerVp Dynamics Labs (Mobile) Ltd Oct 2013 - Jun 2015- Verilog implementation of the video and image processing algorithms (RGBW engine).- To support a partner company for FPGA prototype of 4K TV.- To support a partner company to integrate the RGBW engine into a display driver IC.
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Senior Hardware EngineerVp Dynamics Labs (Mobile) Ltd Apr 2013 - Oct 2013
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Senior Ic Design Engineer IiSolomon Systech Limited Jul 2011 - Apr 2013Shatin, New Territories, Hk- In charge of custom design of SRAM for LCD display driver IC and specific multi-ports register-file for capacitive touch controller IC.- Developed high-design and high-speed SRAM design flow.- Developed an in-house EDA tool to reduce SRAM layout time.- Conducted research on embedded 2T dynamic RAM IP with ordinary CMOS process.- Developed TRIAC dimmable offline LED lighting driver IC.- Developed 18-bit resolution, 5uA-1.2A current range, and dimmable OLED lighting driver IC.- Developed active stylus for capacitive touch panels.- Filed 1 patent and published 1 first-author conference paper.First-author conference paper:1. "Design Challenge of 1440-channel TFT Source Driver for Smart Phones, using Data Compression for Embedded Display Memory", China Display/Asia Display Conference, 2011. -
Senior Ic Design Engineer ISolomon Systech Limited Jul 2009 - Jul 2011Shatin, New Territories, Hk
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Ic Design Engineer IiiSolomon Systech Limited Jul 2007 - Jul 2009Shatin, New Territories, Hk
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Technician Of Very-Large-Scale Integration (Vlsi) Research LabThe Hong Kong University Of Science And Technology Jul 2001 - Jul 2007Kowloon, Hong Kong, Hk- Conducted research on high-speed and low-power digital circuits.- Setup and maintained IC design tools and flow.- Taught electrical and electronic laboratory classes.- Supported postgraduate students on tape-out procedure and ICs testing.- Published 2 first-author journal papers and 1 first-author conference paper.First-author journal paper:1. Hing-Mo Lam, Chi-Ying Tsui, "High performance single clock cycle CMOS comparator", Electronics Letters, 2006 (Without IC)2. Hing-Mo Lam, Chi-Ying Tsui, "A mux-based High-Performance Single-Cycle CMOS Comparator", IEEE TCAS-II, Vol. 54, No. 7, 2007First-author conference paper:1. Hing-mo Lam ; Chi-ying Tsui, "High performance single clock cycle CMOS comparator"ISCAS, 2006 (With IC)
Hing-Mo Lam Skills
Hing-Mo Lam Education Details
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Peking UniversityIntegrated Circuit Design -
The Hong Kong University Of Science And TechnologyIntegrated Circuit Design
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The Hong Kong University Of Science And TechnologyIntegrated Circuit Design
Frequently Asked Questions about Hing-Mo Lam
What company does Hing-Mo Lam work for?
Hing-Mo Lam works for Omnivision
What is Hing-Mo Lam's role at the current company?
Hing-Mo Lam's current role is Principal Design Engineer.
What is Hing-Mo Lam's email address?
Hing-Mo Lam's email address is ee****@****ail.com
What schools did Hing-Mo Lam attend?
Hing-Mo Lam attended Peking University, The Hong Kong University Of Science And Technology, The Hong Kong University Of Science And Technology.
What skills is Hing-Mo Lam known for?
Hing-Mo Lam has skills like Electronics, Ic, Logic Design, Asic, Electrical Engineering, Sram, Simulations, Semiconductors, Research.
Who are Hing-Mo Lam's colleagues?
Hing-Mo Lam's colleagues are Layhong Tan, Sachihiko Ota, Nobuhiro Yanagisawa, Kim Pham, Qian Michael, 仲小挺, Sheng-Chi Kao.
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