Elias Kouskoumvekakis Email & Phone Number

Athens, Greece

Emulation/virtualization software and FPGA engineer working on the company's Charon products that run on modern processors and emulate unmodified legacy enterprise systems that once run on DEC (PDP, VAX, Alpha), HP (3000) and Sun (SPARC v8 and v9) processors.- Currently working within an international team that is:1. Building new emulation products.2. Building a cloud automation platform for existing emulation products.- Previously worked on:1. Emulation of a legacy DMA controller on FPGA device hardware from Xilinx, using PCIe and USB protocols for host connectivity. Worked across all areas of hardware design, implementation and simulation/verification, as well as on the software components.2. Firmware emulation of an advanced legacy architecture for a new emulation product.3. Utilization of x86-64 CPU/MMU hardware virtualization extensions (Intel’s VT-x & AMD’s SVM) to accelerate legacy OS emulation.4. Extensive developer documentation of product source code.5. Involvement in migration efforts (field engineering) for Greek and international client projects.

Athens, Greece

I worked on the research project "StochSoCs: Flexible Systems on Chip for Parallel Stochastic Simulation of Large Biochemical Networks in Systems Biology" which is part of "AristeiaII" that is co-financed by national (Greek GSRT) and EU funds.The project's main goal was to accelerate stochastic simulations of large-scale biochemical reaction networks defined in SBML (Systems Biology Markup Language) with custom hardware accelerators on FPGA devices and software simulators for validation and verification purposes.I successfully handled the following areas: Project management, team organization, writing of deliverables, design and implementation of hardware (VHDL) and software components (C /C++11/PHP with Symfony framework). The latter included a multi-threaded client for bi-directional communication with the 3rd party PCIe DMA driver - PCIe core on the FPGA SoCs and a parallel simulator that targets multi-core CPUs (shared memory) & the many-core Intel SCC NoC (distributed memory) for validation and verification purposes. I also developed a web application and associated decoupled backend components that communicate via message queues in order to provide an easy to use service for remote authorized users to perform efficient stochastic simulations of biological systems, supplied in the standard SBML bio-model format.Two IEEE conf. papers (DSD’15 & HPCS’15) were published with important results.Principal investigator: Prof. Elias ManolakosMore information: http://stochsocs.di.uoa.gr

Athens, Greece

Selected to work on my project proposal (RISC-V port to Parallella) for the Free and Open Source Silicon (FOSSi) foundation. I managed to successfully implement on the FPGA fabric of Parallella’s Zynq SoC two 64-bit RISC-V ISA core designs, one without FP support (RV64IMA) and one with FP support (RV64IMAFD) that were both generated using the Rocket-Chip generator of UCB-BAR group from University of California, Berkeley. The ported cores were able to boot the Linux kernel and use the Poky root filesystem distribution from the Yocto project.Mentors: Andreas Olofsson (Adapteva, Parallella) and Olof Kindgren (FOSSi)More information: http://github.com/eliaskousk/parallella-riscv

Athens, Greece

Design, development and webhosting of dynamic websites along with server administration. Developed a custom content management system using PHP and MySQL.

Doctor Of Philosophy - Phd, Distributed Machine Learning & Deep Learning

Master Of Science (Msc), Microelectronics, Design Of Integrated Circuits, Vlsi, 8.75 / 10

Bachelor Of Science (Bsc), Computer Science, Telecommunications, Gpa 7.8 / 10