Elie Rosen Email & Phone Number

In my role, leading the BLT Technical Solutions team, we partner closely with our clients, serving as trusted advisors committed to ensuring first-time success and the highest quality in architecting technical solutions for the nation’s most advanced, bleeding-edge designs.Together, we tackle complex technical challenges, delivering results on-time or ahead of schedule, providing engineering resources to seamlessly augment client teams, and developing strategic solutions that drive measurable outcomes for those who engage with us.Dedicated to quality, our team bridges advanced technology requirements with practical implementation, delivering both immediate impact and sustained value.

AMD Xilinx Architecture Subject Matter Expert:Specialized in efficient and optimized high-performance embedded FPGA based designs Key experience in Versal, UltraScale+, UltraScale, and 7-Series architecture technologies including many types of hard IP implementationExpert in ARM based processing subsystems found in devices such as the UltraScale+ MPSoC and RFSoCExperience in a multitude of High-Speed based protocols including; PCIe, 10G/25G/100G Ethernet, JESD, Aurora, DisplayPort, SATA, and many others.PCB component selection and schematic design with multiple FPGA and over 250 Gbps of bandwidth capabilityXilinx Authorized Training Instructor (100+ students per year):-- ACAP, RFSoC, MPSoC, and 7-series Zynq based embedded design-- Versal, UltraScale+, and 7 Series Architecture-- Xilinx best design practices for timing closure and constraints-- Hardware Language courses including: System Verilog, Verilog, and VHDL-- Clock domain crossings-- C-based High Level Synthesis

Falls Church, Va, Us

ASIC RTL/Verification - System Verilog, UVMFPGA based radar processing design, integration, verification, and test - VHDL, Xilinx Virtex 7 devices

New Brunswick, Nj, Us

ECE 492/519: Hardware/Software Design of Embedded SystemDeveloped the instructional lab for a new course at Rutgers based on the Altera DE2-115 FPGA Development Board that includes topics on Flip-Flops and Latches, Complex Addition Systems, Finite State Machines, ALUs, Ethernet, VGA, IR, and RAM.Expected student outcome: A complex understanding of FPGAs and their use in industry including advanced knowledge of the VHDL hardware description language and proper testing and verification techniques for implementing functional hardware.

New Brunswick, Nj, Us

Developed custom web pages and applications for departments, graduate programs, and professors along with various designs actively used across 15+ Rutgers websites

Chestnut Ridge, Ny, Us

Designed the digital front-end of a 12-bit Analog/Digital converter for use in mid-range to high-end digital oscilloscopes. Worked with various communication protocols and standards including: SPI, JTAG, and JESD at the hardware implementation level. Implemented UVM test sequences and agents to verify overall system design. Created scripts for increased productivity in Cadence. Maintained accurate and detailed documentation for all completed work.

Munich, De

During my Internship at Siemens; I programmed Schneider Modicon Quantum PLC to build Baggage Handling System (BHS) for Minneapolis St. Paul airport, designed Human Machine Interface (HMI) used for overview of BHS system health and operator controls, created tools to generate documentation and test plans from databases with over 10,000 entries, and I was a primary presenter of the Factory Acceptance Test to client; which enabled the project to enter the next stage of development.

Master Of Science (Ms), Computer Engineering

Bachelor Of Science (B.S.), Major: Electrical & Computer Engineering, Minor: Entrepreneurship