Co-Chief Executive Officer
CurrentDuring this period, I have lead the design and development of IP cores and SoC solutions on FPGA platforms. I have performed comprehensive verification of IP and SoC designs to ensure functionality and performance. I have collaborated with cross-functional teams, including hardware, software, and system engineers, to define requirements and deliver robust solutions. I have developed and execute test plans, create testbenches, and perform simulations to validate designs.Optimize FPGA designs for performance, power, and area, ensuring efficient use of resources. I have guide junior engineers, providing technical leadership and expertise.I always stay updated with industry trends and advancements in FPGA technology and apply them to improve design and verification processes.