Babar Sultan

Babar Sultan Email and Phone Number

Application Engineer @ Altera
Cambridge, GB
Babar Sultan's Location
Cambridge, England, United Kingdom, United Kingdom
About Babar Sultan

Experienced FPGA engineer with a passion for developing hardware and software solutions that solve real‑world problems. I am a dedicated, hardworking, self‑motivated engineer with a passion for learning and FPGAs. I maximize my value by being a great teammate and making sure my designs work before they reach the lab. I have more than 5 years of experience in implementing, verifying and testing FPGA designs. I alsospecialize in FPGA interfaces including ADCs, DACs, DDR3 memory, UART, SPI, and I2C.

Babar Sultan's Current Company Details
Altera

Altera

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Application Engineer
Cambridge, GB
Website:
altera.com.tr
Babar Sultan Work Experience Details
  • Altera
    Application Engineer
    Altera
    Cambridge, Gb
  • Toshiba Europe Ltd
    Hardware Design Engineer
    Toshiba Europe Ltd Oct 2023 - Present
    Cambridge, England, United Kingdom
    Design FPGA-based platforms for Quantum Key Distribution systems.
  • Erays Technologies Pvt, Ltd.
    Senior Fpga Engineer
    Erays Technologies Pvt, Ltd. Mar 2022 - Sep 2023
    Islamabad, Islāmābād, Pakistan
    • The FPGA implementation of DOA estimation algorithms key operations based on QRD are developed. The resources utilization of such operations is presented for a ULA consisting of five or nine antenna elements, when math operations are implemented using fixed point representation.• The FPGA implementations of key operations are integrated, with optimization in terms of resources utilization and speed, to form a complete DOA algorithm.• Peripheral interfaces (USB, I2C, SPI, storage… Show more • The FPGA implementation of DOA estimation algorithms key operations based on QRD are developed. The resources utilization of such operations is presented for a ULA consisting of five or nine antenna elements, when math operations are implemented using fixed point representation.• The FPGA implementations of key operations are integrated, with optimization in terms of resources utilization and speed, to form a complete DOA algorithm.• Peripheral interfaces (USB, I2C, SPI, storage, high‑speed ADCs and DACs).• Familiar with Linux environment. hands on experience on Shell/Scripting.mented on FPGA includes 8192x120 point FFT, Data sorting and Storage, Digital Filter Implementation (FIR) and AXI data communication.• Design for Testability (DFT): Implement of Testability techniques and features i.e. SCAN‑Chain covering digital logic domain. Experience workingwith Cadence DFT tools (Genus). Knowledge of Scan flow development, ATPG pattern generation, verification and coverage analysis.• Excellent experience with Lab Equipment i.e. Oscilloscope, Signal Vector Generator, Spectrum Analyzer and waveform Simulators Show less
  • National Radio Telecommunication Corporation
    Project Engineer
    National Radio Telecommunication Corporation Apr 2019 - Mar 2022
    Harīpur, Khyber Pakhtunkhwa, Pakistan
    • FPGA Implementation of Real‑time Spectrum Analyzer: Extremely high Scan‑Rate up to 30 GHz/s 56 MHz Real‑Time instantaneous bandwidth High Time Resolution Spectrogram. Frequency range is 70 MHz to 6 GHz. Scan rate (full span) 30 GHz/s (typ.) @ RBW = 300 kHz.• Development of Software Define Radio: Implement SDR for UHF/ VHF Radio communication Using FPGA. Interfaced High Frequency ADC and DAC (AD9361) with FPGA (Z7035). Implemented different DSP techniques such as FFT’s, FIRs Filtering… Show more • FPGA Implementation of Real‑time Spectrum Analyzer: Extremely high Scan‑Rate up to 30 GHz/s 56 MHz Real‑Time instantaneous bandwidth High Time Resolution Spectrogram. Frequency range is 70 MHz to 6 GHz. Scan rate (full span) 30 GHz/s (typ.) @ RBW = 300 kHz.• Development of Software Define Radio: Implement SDR for UHF/ VHF Radio communication Using FPGA. Interfaced High Frequency ADC and DAC (AD9361) with FPGA (Z7035). Implemented different DSP techniques such as FFT’s, FIRs Filtering, Data compression etc. I also implementFrequency Hopping to secure communication.• FPGA Implementation of Digital modulation schemes namely the frequency shift keying (FSK), phase shift keying (PSK) and quadrature amplitude modulation (QAM) and Analog modulation namely the Amplitude Modulation (AM)and Frequency modulation (FM) are chosen to be the modulation schemes to design the software‑defined radio system.• FPGA Implementation of different tactical radios features in SDR i.e. Noise Squelch & Tone Squelch, Encryption, Data/voice Compression and Data Correction techniques.• FPGA Implementation of Reactive Jamming System: Design an optimized solution in Reactive Jamming that can jam the and signal between 70MHz to 6GHz with the sensitivity of ‑120dB. Reaction time is 42us @ 56MHz bandwidth. Show less
  • International Islamic University, Islamabad
    Design Engineer
    International Islamic University, Islamabad Jul 2017 - Apr 2019
    Islamabad, Islāmābād, Pakistan
    Research and Develop a new product for video stabilization in real time without any hardware information i.e. gyro etc.• Develop a custom hardware for a computer vision algorithm for stabilizing a video against high frequency noise i.e., VIBRATION, JITTERS, JERKS and UNWANTED ROTATION and MOTION. It takes a video as input, and after stabilization, returns a stabilized version of that video.• Won the 1st prize in final evaluation of Video Stabilization’s product in all over… Show more Research and Develop a new product for video stabilization in real time without any hardware information i.e. gyro etc.• Develop a custom hardware for a computer vision algorithm for stabilizing a video against high frequency noise i.e., VIBRATION, JITTERS, JERKS and UNWANTED ROTATION and MOTION. It takes a video as input, and after stabilization, returns a stabilized version of that video.• Won the 1st prize in final evaluation of Video Stabilization’s product in all over Pakistan.• GPU is used to process the image quickly and to implement different image processing techniques using OpenCV.• Implement real Time Object classification using Machine Learning techniques on different hardware. Also collect and Generate the different data‑sets of 13 different classes.• Implement CNN model to classify the object with the different optimizing technique to reduce the hardware or processing time with good accuracy.• Supervised five different Final year Projects (FYPs) for Undergraduate in two and got position every years.• Deliver lecture and lab on different subjects .i.e Circuit Analysis, DLD and DSP Show less

Babar Sultan Education Details

Frequently Asked Questions about Babar Sultan

What company does Babar Sultan work for?

Babar Sultan works for Altera

What is Babar Sultan's role at the current company?

Babar Sultan's current role is Application Engineer.

What schools did Babar Sultan attend?

Babar Sultan attended National University Of Sciences And Technology (Nust), International Islamic University, Islamabad.

Who are Babar Sultan's colleagues?

Babar Sultan's colleagues are Levent Ocaktan, Ozer Pilge.

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