Eric Kalkanger Email & Phone Number

Austin, Tx, Us

San Francisco, California, Us

• Tech lead for cloud software cost efficiency initiatives• Migration of workloads to AWS Graviton instances, resulting in performance increases of up to 15% and cost savings of up to 50%• Develop tools for profiling cloud scale workloads and provide actionable performance insights• Mentor and team lead in software development, analysis, and debugging

Cambridge, Cambs, Gb

• Team lead for programming language, runtimes, and libraries performance analysis and optimization• Manage team by fostering grown and setting technical direction for four engineers• Evaluate and understand performance implications of runtime mechanism including garbage collection, intrinsics, and code generation• Experienced in planning and executing team projects with strong communication with customers and management• Develop software and perform performance analysis to optimize software for existing and upcoming Arm servers• Develop benchmarks to stress architecture features and perform competitive analysis• Lead technical collaboration with key datacenter partners with focus on providing expertise and open lines of communication

Cambridge, Cambs, Gb

Atlanta, Georgia , Us

Thesis Title: "Application-Level Modeling and Analysis of Time and Energy for Optimizing Power-Constrained Extreme-Scale Applications"• Examined power-constrained runtime optimization of task graph-based high performance applications• Constructed eaudit tool for exploring parallel application energy consumption on CPUs and accelerators• Built Eiger Statistical Modeling Framework for fast, approximate models of performance for modeling large scale systems

Atlanta, Georgia , Us

Supported the graduate-level Advanced Programming Techniques course, covering advanced C++, OpenGL, CUDA, MPI, and OpenMP programming.

Los Alamos, Nm, Us

• Created methodology for instrumenting application behavior to drive architecture-independent models of cache behavior• Produced a robust model of cache behavior that delays selection of configuration until after runtime instrumentation

Richland, Wa, Us

• Explored feasibility of dynamic frequency scaling to optimize performance of HPC systems under power cap• Implemented measurement and modeling infrastructure for large-scale power data collection on cluster test bed

Albuquerque, Nm, Us

• Interfaced Eiger with the SST/macro macro-scale simulator• Explored machine learning techniques for regression and dimensionality reduction and their application to model generation

Albuquerque, Nm, Us

• Developed buffered flow-control mechanism for exascale supercomputer network simulation• Analyzed contention effects on buffer capacity in large scale computer networks

Atlanta, Georgia, Us

• Worked on GPU VSIPL, an implementation of the Vector Signal Image Processing Library for the NVIDIA CUDA platform• Implemented blocked SVD algorithm on GPU accelerator

Doctor Of Philosophy (Ph.D.), Electrical And Computer Engineering

Master’S Degree, Electrical And Computer Engineering

Bs, Computer Engineering