Eric Mautner Email & Phone Number

With over 15 years of experience in ASIC design and development, I am a consultant at Draper Laboratory, where I apply my expertise in RISC-V, Xilinx Vivado, and hardware to create innovative solutions for complex engineering challenges. I have contributed to multiple patents in the field of asynchronous timing exchange and clock synchronization, demonstrating my creativity and problem-solving skills. Previously, I worked as an ASIC design contractor at AMD, where I helped design and verify high-performance microprocessors. My mission is to leverage my technical knowledge and experience to deliver quality and reliable products that meet the needs and expectations of our clients. I value collaboration, learning, and excellence, and I am always eager to explore new technologies and domains.

Listed skills include Fpga, Asic, Verilog, Hardware Architecture, and 12 others.

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  Consultant

  Draper Laboratory

  Aug 2012 - Present

  DreamChaser SNC CRS2 Fault Tolerant Flight Computer FPGA Design Lead