Eric S.
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Eric S. Email & Phone Number

Verification Team Lead and Architect - Vision and ADAS at NXP Semiconductors
Location: Ottawa, Ontario, Canada 8 work roles 1 school
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Role
Verification Team Lead and Architect - Vision and ADAS
Location
Ottawa, Ontario, Canada
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Eric S. is listed as Verification Team Lead and Architect - Vision and ADAS at NXP Semiconductors, a company with 22471 employees, based in Ottawa, Ontario, Canada. AeroLeads shows a matched LinkedIn profile for Eric S..

Eric S. previously worked as Verification Team Lead & Architect - Vision and ADAS at Nxp Semiconductors and Verification Team Lead & Architect - Vision and ADAS at Nxp Acquires Freescale Semiconductor. Eric S. studied at Polytechnique Montréal.

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NXP Semiconductors

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About Eric S.

Solid experience gained in leading, architecting, design, implementation and debugging of ASICs, FPGA’s, SoC and Software in ADAS, Space System, wireless audio device and data communications. Knowledge of Verilog and VHDL, strong knowledge of design and verification tools (System Verilog, UVM, System C, C/C++). Knows how to properly validate and push devices/software to their limit in term of resource usage. Skills to solve the toughest ASIC, FPGA and Software; Architecture, design and verification problems.Specialties: Asic VerificationEmbedded Software design & VerificationLanguages: System Verilog, OVM, UVM, C/C++, Python, Verilog, VHDL, TCL, PERL, ASM, SystemC, Vera, bash/tcsh scripting, ..

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NXP Semiconductors
Nxp Semiconductors
Verification Team Lead and Architect - Vision and ADAS
Ottawa, ON, CA
Website
Employees
22471
AeroLeads page
8 roles · 26 years

Eric S. work experience

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Verification Team Lead And Architect - Vision And Adas

Ottawa, ON, CA

Verification Team Lead & Architect - Vision And Adas

Current

Kanata, Ottawa, Canada Area

Responsibilities: * Manage Risk, Schedule, Tasks, Hiring, Lead & Mentor team and Intern * Develop schedules and provide project tracking matrix * Working with architects & customers to develop specifications * Establish Hardware/Software requirement for verification * Evaluate and Select tools for the verification platform * Architect and Implement.

Dec 2015 - Present

Verification Team Lead & Architect - Vision And Adas

Ottawa, Canada Area

Nov 2012 - Aug 2015

Sr. Systems & Electrical Engineer

Neptec Design Group

Kanata

  • All the following system includes Embedded Processor (MicroBlaze, Power PC and DSP), external Processor, DSP, CPLD and system chip (SoC). Software and hardware are closely integrated to provide the best.
  • Astro-H Metrology System (CAMS): The System measure the displacement of the Hard X-ray Imager relative to the satellite.
  • IVIGMS: Integrated Vision, Imaging and Geological Mapping Sensor (IVIGMS) is a hybrid vision system targeted rover mounted robotic prospecting and mapping applications.
  • Angels: A Laser Range Finder that is capable of 20 km with resolution of +/- 2 meters
  • TriDar: A LiDar camera system including Tri-angulations, Time of Flight (ToF) and infrared camera.
  • LRVS: Luna Resource Vision System.
2008 - Nov 2012

Senior Designer/Prime/Lead

Kanata

  • The ZORO2400 is a wireless audio device that uses the 2.4 GHz band to provide lossless audio transmission with a robust interference management. This device includes an R8051 microcontroller used to control the custom.
  • Establishing Hardware/Software requirement for verification
  • Evaluate and Select tools for the verification platform
  • Architect and Implement Verification Platform in System C (OVM, UVM) and C/C++
  • Architect and implement the testcase methodology
  • Mentor to all the members of the verification team (+/- 6 people)
2004 - 2008 ~4 yrs

Asic Verification

Nepean

  • Project part of ATI division (Advance Technology Investment), the goal of this project was to make proof of concept of a hardware/software platform that could do Worm signature scan/detection using FPGA/Micro.
  • Establishing Hardware requirement for verification
  • Evaluate and Select tools for the verification platform
  • Architect and Implement Verification Platform in Vera
  • Architect and implement the testcase methodology
  • Mentor to all the members of the verification team (+/- 10 people)
2000 - 2004 ~4 yrs

Asic Designer & Verification

Montreal, Canada Area

Implementation of the ITU G.729AB voice compression algorithm. Using the Conjugate Structure Algebraic Codebook Linear Prediction algorithm, 16-bit samples of speech made at 8 kHz are compressed into an 8kb/s stream.Voice activity detection with comfort noise generation further reduces the average bit rate during silence periods. This is especially useful.

2000 - 2004 ~4 yrs
Team & coworkers

Colleagues at NXP Semiconductors

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1 education record

Eric S. education

FAQ

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What company does Eric S. work for?

Eric S. works for NXP Semiconductors.

What is Eric S.'s role at NXP Semiconductors?

Eric S. is listed as Verification Team Lead and Architect - Vision and ADAS at NXP Semiconductors.

Where is Eric S. based?

Eric S. is based in Ottawa, Ontario, Canada while working with NXP Semiconductors.

What companies has Eric S. worked for?

Eric S. has worked for Nxp Semiconductors, Nxp Acquires Freescale Semiconductor, Cognivue Corporation, Neptec Design Group, and Kleer Semiconductor.

Who are Eric S.'s colleagues at NXP Semiconductors?

Eric S.'s colleagues at NXP Semiconductors include Eric Lin, Stefan Barbu, Ford Fu, Lee Ann Seymour, and Joseph Chen.

How can I contact Eric S.?

You can use AeroLeads to view verified contact signals for Eric S. at NXP Semiconductors, including work email, phone, and LinkedIn data when available.

What schools did Eric S. attend?

Eric S. studied at Polytechnique Montréal.

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