Eric Deal Email & Phone Number

Austin, Tx, Us

Austin, Tx, Us

Design and licensing of BCH error correction IP, enabling customers to utilize NAND flash without having to develop ECC expertise.

Austin, Texas, Us

Micro-architecture and design of system interconnect and subsystems in Ambiq's low-powered CPUs (cache, SRAM, DMA, CPU/peripheral busses, flash/NVRAM, and multi-bit SPI peripheral). Implemented creative low-power solutions and re-architected infrastructure to address issues unique to Ambiq's SPOT designs. Support of tapeout activities such as synthesis, timing analysis, backend timing optimization, and ECO scripting. Wrote several tools (perl/TCL/C) to automate chip development activities.Developed Linux/TCL based validation platform to enable testing of pre-production silicon and automate test generation and data collection. Designed logic for validation board FPGA to support control of ADC/DACs, peripheral emulation/testing, and execution/debug of scan patterns. Implemented SQL database to track validation data.

Development of hardware for new product including architecture, digital design, FPGA selection/synthesis, and board design. I am also our web designer and IT guru :-)

SigmaTel was acquired by Freescale...

Design and architecture of MP3/portable audio/video players and related consumer semiconductors. Architected and implemented BCH error correction, encryption, alpha blending, virtual address translation, and bus fabric (AXI) logic. Contributed greatly to the direction of general high-level SOC architecture.

Irvine, Ca, Us

SOC design engineer responsible for busses, processor integration, and IO/peripheral logic. Responsibilities include architecture, design, verification, synthesis, and timing verification of designs. I also like to do linux admin/setup, tool development, and web programming.

Armonk, New York, Ny, Us

Participated in design and verification of ASICs for entry-level RS6000 workstations. Designs included PCI bridge, page table lookup, and internal system busses. Wrote a general simulation environment framework that provided an object-oriented interface to the simulator and wrote behavioral models for PowerPC 601/604 processors, PCI devices, etc.