Eric Deal Email and Phone Number
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SOC digital design and architecture experience with on-chip and off-chip busses, peripherals, DDR memory controller (PHY), and encryption logic.Specialties: BCH, encryption, hashing, AXI, SOC, interconnect, verilog, linux
Silicon Labs
View- Website:
- silabs.com
- Company phone:
- (512)416-8500
- Company email:
- feedback@silabs.com
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Principle Digital Design EngineerSilicon Labs Jan 2020 - PresentAustin, Tx, Us -
PresidentCyclic Design May 2009 - PresentAustin, Tx, UsDesign and licensing of BCH error correction IP, enabling customers to utilize NAND flash without having to develop ECC expertise. -
Senior Digital Design EngineerAmbiq Micro Nov 2014 - Jan 2020Austin, Texas, UsMicro-architecture and design of system interconnect and subsystems in Ambiq's low-powered CPUs (cache, SRAM, DMA, CPU/peripheral busses, flash/NVRAM, and multi-bit SPI peripheral). Implemented creative low-power solutions and re-architected infrastructure to address issues unique to Ambiq's SPOT designs. Support of tapeout activities such as synthesis, timing analysis, backend timing optimization, and ECO scripting. Wrote several tools (perl/TCL/C) to automate chip development activities.Developed Linux/TCL based validation platform to enable testing of pre-production silicon and automate test generation and data collection. Designed logic for validation board FPGA to support control of ADC/DACs, peripheral emulation/testing, and execution/debug of scan patterns. Implemented SQL database to track validation data. -
Founder/Vp Hardware EngineeringMultixtor Jun 2008 - Aug 2009Development of hardware for new product including architecture, digital design, FPGA selection/synthesis, and board design. I am also our web designer and IT guru :-)
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Digital Design Engineer (E5)Freescale Semiconductor May 2008 - Jun 2008SigmaTel was acquired by Freescale...
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Principle Member Of Technical Staff - Digital Design EngineerSigmatel Dec 2005 - May 2008Design and architecture of MP3/portable audio/video players and related consumer semiconductors. Architected and implemented BCH error correction, encryption, alpha blending, virtual address translation, and bus fabric (AXI) logic. Contributed greatly to the direction of general high-level SOC architecture.
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Principle EngineerConexant Systems, Inc Nov 1996 - Oct 2005Irvine, Ca, UsSOC design engineer responsible for busses, processor integration, and IO/peripheral logic. Responsibilities include architecture, design, verification, synthesis, and timing verification of designs. I also like to do linux admin/setup, tool development, and web programming. -
Sr. Staff EngineerIbm 1992 - 1997Armonk, New York, Ny, UsParticipated in design and verification of ASICs for entry-level RS6000 workstations. Designs included PCI bridge, page table lookup, and internal system busses. Wrote a general simulation environment framework that provided an object-oriented interface to the simulator and wrote behavioral models for PowerPC 601/604 processors, PCI devices, etc.
Eric Deal Skills
Eric Deal Education Details
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Texas A&M UniversityElectrical Engineering
Frequently Asked Questions about Eric Deal
What company does Eric Deal work for?
Eric Deal works for Silicon Labs
What is Eric Deal's role at the current company?
Eric Deal's current role is Principal Digital Design Engineer/Manager at Silicon Labs.
What is Eric Deal's email address?
Eric Deal's email address is er****@****ant.com
What is Eric Deal's direct phone number?
Eric Deal's direct phone number is +151233*****
What schools did Eric Deal attend?
Eric Deal attended Texas A&m University.
What skills is Eric Deal known for?
Eric Deal has skills like Verilog, Soc, Fpga, Hardware Architecture, Integrated Circuit Design, Rtl Design, Hardware, Debugging, Rtl Coding, Embedded Systems, Ic, Asic.
Who are Eric Deal's colleagues?
Eric Deal's colleagues are Kai Seng Lee, Akhil Raghupathi, Claudio Filho, Sowmiya Muthusami, Adhan Razzaque, Haining Liu, Sakthi Guru.
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