System-On-Chip Design Engineer
CurrentRTL design of various generic OTN building blocks.
Please complete the CAPTCHA to continue
A concise factual answer block for searchers comparing this professional profile.
Erik Andersen is listed as ASIC/FPGA design engineer | uArchitect | Design | Implementation | RTL | Verification | Debug | Verilog | VHDL | Team at Intel Corporation, a with 133841 employees, based in Birkerød, Capital Region of Denmark, Denmark. AeroLeads shows a matched LinkedIn profile for Erik Andersen.
Erik Andersen previously worked as System-on-Chip Design Engineer at Intel Corporation and FPGA design engineer at Altera. Erik Andersen holds Master'S Degree, Master Of Science Engineering from Dtu - Technical University Of Denmark.
This section adds company-level context without repeating Erik Andersen's masked contact details.
Review company-level records connected to Erik Andersen before choosing the right outreach path.
Erik Andersen is a ASIC/FPGA design engineer | uArchitect | Design | Implementation | RTL | Verification | Debug | Verilog | VHDL | Team at Intel Corporation.
Company context helps verify the profile and gives searchers a useful next step.
A career timeline built from the work history available for this profile.
Copenhagen Metropolitan Area
RTL design of various generic OTN building blocks.
Copenhagen, Capital Region, Denmark
San Jose, California, United States
RTL design of Ethernet Switching building blocks, mostly traffic management including implementations of WFQ, WERR, WRED, self healing buffer memory architecture, 3-stage hierarchical scheduler.
Copenhagen, Capital Region, Denmark
Copenhagen, Capital Region, Denmark
Other employees you can reach at intel.com. View company contacts for 133841 employees →
Edward Ng
Colleague at Intel CorporationMedan, North Sumatra, Indonesia
View →
MZ
Md Zafar
Colleague at Intel CorporationDelhi, India
View →
PB
Prasad Bilugu
Colleague at Intel CorporationAndhra Pradesh, India
View →
OJ
Oducha Jayesh
Colleague at Intel CorporationAhmedabad, Gujarat, India
View →
BO
Brice Onken
Colleague at Intel CorporationPortland, Oregon Metropolitan Area, United States
View →
UI
Ubong I.
Colleague at Intel CorporationDallas, Texas, United States
View →
CH
Chen-Yu Hsu
Colleague at Intel CorporationBeaverton, Oregon, United States
View →
AF
Ahmadreza Farsaei, Ph.D.
Colleague at Intel CorporationSan Jose, California, United States
View →
DN
Duc Nguyen
Colleague at Intel CorporationHillsboro, Oregon, United States
View →
TP
Thomas Phillips
Colleague at Intel CorporationPortland, Oregon, United States
View →
Quick answers generated from the profile data available on this page.
Erik Andersen works for Intel Corporation.
Erik Andersen is listed as ASIC/FPGA design engineer | uArchitect | Design | Implementation | RTL | Verification | Debug | Verilog | VHDL | Team at Intel Corporation.
Erik Andersen is based in Birkerød, Capital Region of Denmark, Denmark while working with Intel Corporation.
Erik Andersen has worked for Intel Corporation, Altera, Tpack, Broadcom Inc., and Nea-Lindberg A/S.
Erik Andersen's colleagues at Intel Corporation include Edward Ng, Md Zafar, Prasad Bilugu, Oducha Jayesh, and Brice Onken.
You can use AeroLeads to view verified contact signals for Erik Andersen at Intel Corporation, including work email, phone, and LinkedIn data when available.
Erik Andersen holds Master'S Degree, Master Of Science Engineering from Dtu - Technical University Of Denmark.
Search by job title, company, industry, location, and seniority. Export verified B2B contact data when you need it.
Start free trial Search contactsCheck these profiles if this is not the Erik Andersen you were looking for.
View similar profiles