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An accomplished researcher and engineer with more than 10 years of combined academic and industrial experience in the fields of Radio receiver system design, analog baseband design, passive mixer based front-ends, ΣΔ modulation for Fractional-N PLL frequency synthesizers, and mixed-signal chip verification. Strong understanding of RF and analog impairments and their impact on receiver performance (SNR, blocking, etc.). Proficient in MATLAB. Strongly believes in the importance of analytical skills as a foundation of sound circuit design even in the era of powerful simulators. Hands-on experience with lab measurements.
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Director Of Asic EngineeringMems Vision Oct 2021 - PresentCairo, Egypt
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Design Engineering ManagerSilicon Labs Mar 2020 - Aug 2021Austin, Texas AreaIoT RF Team -
Radio Design Lead And Staff Rfic Design EngineerSilicon Labs Feb 2019 - 2021Austin, Texas Area
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Staff Design EngineerSilicon Labs Feb 2018 - Feb 2019Austin, Texas Area
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Associate Staff Analog/Mixed-Signal Design EngineerSilicon Labs Aug 2015 - Feb 2018Austin, Texas Area
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Senior Mixed-Signal Design EngineerNvidia Jun 2011 - Jun 2015Richardson Tx* Design of a Reconfigurable Analog Baseband filter + VGAs for 3G/LTE receiver chain..starting from MATLAB analysis to choose the filter transfer function that meets the specifications, then computing the filter components, and then the circuit implementation* Architect of the analog baseband chain* RF System Design of the 3G, Dual-Cell 3G, TD-SCDMA, and LTE receiver chains...this includes receiver spec derivation based on the 3GPP standard tests, budgeting the performance of individual blocks in the chain, developing gain tables, and analyzing the SNR of the overall receiver while accounting for analog receiver impairments such as PLL phase noise and IQ mismatch * Participated in architecture of the LTE carrier aggregation Front-end* Lead for the top-level analog mixed-signal functional verification of the carrier aggregation receiver -
Rfic Design EngineerIcera Semiconductor Inc (Acquired By Nvidia In 2011) Jan 2010 - Jun 2011Richardson Tx* Top-level Analog/Mixed-Signal Verification of 2G/3G Transceiver Calibration Loops * RF System Design of 2G/3G/LTE receiver: Developed an interactive tool using Microsoft Excel using modules powered by VBA programming* Architect of the analog baseband chain* Design of a 2G/3G Analog Baseband Filter and VGA in the Receiver chain* Worked with the modem team on optimizing the receiver gain table (using silicon measurements) to improve the 3G/LTE receiver SNR -
Design InternSirific Wireless Jan 2008 - May 2008Richardson Tx* Study of Passive Mixer IIP2, and best ways to simulate >60dBm IIP2* Design of 3G Front-end -
Teaching And Research AssistantAin Shams University Sep 2002 - Dec 2006Cairo, Egypt* Taught a variety of undergraduate classes in the areas of circuit design and electromagnetic waves including analog IC design, basic amplifier circuits design, and microwave engineering* Research on All-digital Fractional-N PLL frequency synthesizers, based on ΣΔ Frequency Discriminators
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Design EngineerSi-Ware Systems Oct 2003 - Nov 2006Cairo, EgyptOPAMP Design, Verilog-A modeling, ΣΔ Modulators for Fractional-N PLLs, top-level verification of a mixed-signal clock-generator chip, High-Frequency Dividers
Essam Atalla Skills
Essam Atalla Education Details
Frequently Asked Questions about Essam Atalla
What company does Essam Atalla work for?
Essam Atalla works for Mems Vision
What is Essam Atalla's role at the current company?
Essam Atalla's current role is Director of ASIC Design at MEMS Vision.
What is Essam Atalla's email address?
Essam Atalla's email address is es****@****eee.org
What schools did Essam Atalla attend?
Essam Atalla attended The University Of Texas At Dallas, Ain Shams University, Ain Shams University.
What skills is Essam Atalla known for?
Essam Atalla has skills like Analog Circuit Design, Mixed Signal, Vlsi, Rf, Integrated Circuit Design, Simulations, Matlab, Circuit Design, Cmos, Pll, Microsoft Excel, Rf System Design.
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Essam Atalla
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