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Eva C. Email & Phone Number

Project Manager |PMP® & PMI-ACP® certified
Location: Cupertino, California, United States 3 work roles 1 school
1 work email found @synaptics.com LinkedIn matched
✓ Verified August 2026 4 data sources Profile completeness 71%

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Work email e****@synaptics.com
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Role
Project Manager |PMP® & PMI-ACP® certified
Location
Cupertino, California, United States

Who is Eva C.? Overview

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Quick answer

Eva C. is listed as Project Manager |PMP® & PMI-ACP® certified based in Cupertino, California, United States. AeroLeads shows a work email signal at synaptics.com and a matched LinkedIn profile for Eva C..

Eva C. previously worked as Product Engineer at Synaptics Incorporated and Product Engineer at Synaptics Incorporated. Eva C. holds B.S., Eecs from University Of California, Berkeley.

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Email format at synaptics.com

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*@synaptics.com
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Profile bio

About Eva C.

Ten+ years of experience and leadership in taking ASIC designs from post tape-out to production release.Worked cross functionally and managed complete device characterization and device qualifications projects.A solid plan with contingencies, timely executions with attention to details, and delivering high quality product on time matters!Successfully taken fingerprint sensors, touch display drivers, discrete touch sensors, and memory controllers to production in Silicon Valley companies.

3 roles · 26 years

Eva C. work experience

A career timeline built from the work history available for this profile.

Product Engineer

San Jose, California, Us

Device Characterizations Management:• Detail and summarize characterization parameter lists• Review parameter test setup and test conditions• Review preliminary measured data for accuracy and range• Review captured data format for uniformity to assure data can be processed• Collect characterization data over Processes, Voltages, and Temperatures• Statistically process the PVT data to show PVT trends with data distributions• Review data with Design and Team, get final approval before declaring characterization is done* Characterization is a long and can be a tedious process requiring much logistical planning. It involves cross functional team participation and management, and it may also require iterations of debugging and repeat data collection as test conditions change.Device Qualification Management:• Determine Stress Test requirements and reference Specifications• Generate Test Plans• Negotiate with qualified external test facilities on project cost, schedule, and capacities• Procure test hardware and fixtures including PCB design review and approval• Make all logistical arrangements between stress test and timely post stress ATE test data collection• Perform ATE data review and data analysis• Perform Failure Analysis if ATE data shows failure• Iterate stress and ATE test as required by specification• Summarize and Report on Device Qualification* The longest pole in Device Qualification is the HTOL test. Effective time management for the HTOL test can improve the overall qualification schedule. * Device Qualifications have very specific stress and post stress ATE test window requirement. These test windows must be observed.Production Test Limits & Production Readiness Evaluation: * Test engineering samples in manufacturing environment with loose test limits, based on these data and the characterization’s PVT data, incorporate test guard-bands to provide test tolerance, quality, and decent production yield anticipation.

2019 - 2023 ~4 yrs

Product Engineer

San Jose, California, Us

New Product Introduction:• Developed and procured ATE probe cards and ATE load boards • Developed bench and ATE test correlation plan• Reviewed silicon Alpha test plan ensure first engineering samples meet expectation• Managed subcontractors and suppliers in tooling up for assemblies, sample builds, and sample deliveries• Completed device qualification of COG on flex and in pin grid array• Performed device validation and characterization, and data analysis• Released industry-first integrated Touch Display Driver to productionManufacturing Support:• Led low-yield investigation, analysis, and DOE resulting in yield improvements from 45% to 98%• Investigated RMAs and drove FA to determine root cause• Audited international supplier in Asia• Created internal test hardware and test program release standard operating procedures

2007 - 2018 ~11 yrs

Ic Test Engineer

Maxim Integraged & Matrix Semiconductor

Test Engineering:• Developed ATE test programs for prototypes, characterization, and production test• Debugged prototypes and characterization tests• Did test program revisions to improve test coverage or reduce test cost• Collaborated with external test house to align ATE configuration with test boards and ensure test setup met product ATE test requirements

2001 - 2007 ~6 yrs
1 education record

Eva C. education

  • University Of California, Berkeley
    University Of California, Berkeley
    Eecs
FAQ

Frequently asked questions about Eva C.

Quick answers generated from the profile data available on this page.

What is Eva C.'s role at their current company?

Eva C. is listed as Project Manager |PMP® & PMI-ACP® certified.

What is Eva C.'s email address?

AeroLeads has found 1 work email signal at @synaptics.com for Eva C..

Where is Eva C. based?

Eva C. is based in Cupertino, California, United States.

What companies has Eva C. worked for?

Eva C. has worked for Synaptics Incorporated and Maxim Integraged & Matrix Semiconductor.

How can I contact Eva C.?

You can use AeroLeads to view verified contact signals for Eva C., including work email, phone, and LinkedIn data when available.

What schools did Eva C. attend?

Eva C. holds B.S., Eecs from University Of California, Berkeley.

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