Fatemeh Es.Haghi Email and Phone Number
As an electronic engineer with 7+ years of experience in mixed-signal circuits and systems design, I am passionate about creating high-performance analog and digital circuits, ensuring robust functionality and seamless integration. - ๐ผ๐ฃ๐๐ก๐ค๐ ๐พ๐๐ง๐๐ช๐๐ฉ ๐ฟ๐๐จ๐๐๐ฃ ๐๐ฃ๐ ๐พ๐๐๐ง๐๐๐ฉ๐๐ง๐๐ฏ๐๐ฉ๐๐ค๐ฃ:At Intelligent Sensing Laboratory (ISL), I contributed to the simulation and design of an interface electronics for MEMS capacitive accelerometers, specifically for gravimetric applications. My responsibilities encompassed the complete characterization and in-lab testing of the device and electronics, achieving remarkable specs with a 5aF noise floor and 110dB dynamic range.- ๐๐๐ญ๐๐-๐๐๐๐ฃ๐๐ก ๐๐ฃ๐ฉ๐๐๐ง๐๐ฉ๐๐ ๐พ๐๐ง๐๐ช๐๐ฉ ๐๐ฃ๐ ๐๐ฎ๐จ๐ฉ๐๐ข ๐ฟ๐๐จ๐๐๐ฃ:During my Ph.D. project, I led the design of a closed-loop neural stimulation microsystem for blood pressure control. Utilizing the standard 0.18um CMOS process, the microsystem featured a neural signal amplifier, analog-to-digital converters, multipolar charge-balanced current-mode stimulation circuit, and digital blocks. The integrated circuit showcased exceptional performance with low power consumption (10uW), minimal noise (4.5uVrms [1-100Hz]) for the neural amplifier, and less than 0.08% balancing mismatch for the neural stimulator. FPGA technology facilitated efficient off-chip sensory signal recordings and data transmission.- ๐๐๐๐ฃ๐๐ก ๐ฅ๐ง๐ค๐๐๐จ๐จ๐๐ฃ๐ ๐๐ฃ๐ ๐๐๐๐ผ ๐ฅ๐ง๐ค๐๐ง๐๐ข๐ข๐๐ฃ๐:I focused on biomedical applications, particularly feature extraction, and classification of ECG signals for high blood pressure detection during my Ph.D. Leveraging QRST waveforms and time-domain feature extraction and SVM classification, our implementation achieved results with an average sensitivity of 89%. In my M.Sc. project, I designed a power-efficient and cost-effective biomedical signal processor using an FPGA for early detection of epileptic seizure onset from ECG signals, with a sensitivity of 72%.I find excitement in opportunities that allow me to apply my expertise in mixed-signal integrated circuits and system design to take on challenging projects, explore cutting-edge solutions, and contribute to the development of advanced technologies.I thoroughly enjoy networking and connecting with new individuals, you can reach me at f.es.hagi@gmail.com.
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Electronic EngineerSonus Microsystems Jan 2024 - PresentVancouver, British Columbia, Canada
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Postdoctoral FellowshipSimon Fraser University Oct 2021 - Jan 2024Vancouver, British Columbia, Canada๐๐๐ฉ๐ก๐: ๐ผ๐ฃ๐๐ก๐ค๐ ๐๐ฃ๐ฉ๐๐ง๐๐๐๐ ๐พ๐๐ง๐๐ช๐๐ฉ ๐ฟ๐๐จ๐๐๐ฃ ๐๐ค๐ง ๐๐๐๐ ๐พ๐๐ฅ๐๐๐๐ฉ๐๐ซ๐ ๐ผ๐๐๐๐ก๐๐ง๐ค๐ข๐๐ฉ๐๐ง๐จ | ๐๐ง๐๐ซ๐๐ข๐๐ฉ๐ง๐๐ ๐ผ๐ฅ๐ฅ๐ก๐๐๐๐ฉ๐๐ค๐ฃ๐จOver the past two years, I had the opportunity to work on a cutting-edge project focused on Analog Interface Circuit Design and Implementation for MEMS Capacitive Accelerometers, tailored to gravimetric applications. As a key member of the team, my role involved developing a high-performance capacitive-to-voltage converter featuring on-board modulation and demodulation circuit, resulting in an impressive dynamic range of 110dB and an exceptionally low noise floor of 5aF. These features exemplify the accuracy and precision of the accelerometers, positioning them as an ideal choice for critical applications demanding top-notch performance and reliability.Through this project, I gained valuable insights into analog circuit design principles and honed my skills in optimizing circuits for precision measurements. Alongside this, we delved into signal processing techniques to further enhance the quality of the acquired data and optimize the overall performance of the system. I collaborated closely with interdisciplinary teams, including MEMS design and system integration experts, contributing to a successful outcome and pushing the boundaries of analog interface technology for MEMS capacitive accelerometers. -
Research AssistantYork University Jan 2019 - Sep 2021Toronto, Canada Area๐๐๐ฉ๐ก๐: ๐๐ข๐ฅ๐ก๐๐ฃ๐ฉ๐๐๐ก๐ ๐๐๐ช๐ง๐๐ก ๐๐ฉ๐๐ข๐ช๐ก๐๐ฉ๐๐ค๐ฃ ๐๐ฎ๐จ๐ฉ๐๐ข ๐๐ค๐ง ๐พ๐ก๐ค๐จ๐๐-๐ก๐ค๐ค๐ฅ ๐ฝ๐ก๐ค๐ค๐ ๐๐ง๐๐จ๐จ๐ช๐ง๐ ๐พ๐ค๐ฃ๐ฉ๐ง๐ค๐กAs part of my Ph.D. thesis project, I led the design and implementation of an advanced closed-loop neural stimulation microsystem for high blood pressure detection and control, utilizing the standard 0.18um CMOS process. The microsystem was engineered for closed-loop neural stimulation, with on-chip vagus nerve signal recording blocks. The integrated circuit featured an 8-channel low-noise tripolar neural signal amplifier and recording circuit optimized for a 24-channel cuff electrode setup. Each recording channel included a dedicated 10-bit SAR analog-to-digital converter, ensuring precise digitization of neural data for seamless transmission to the off-chip FPGA-based signal processor. Additionally, the chip incorporated a 24-channel multipolar charge-balanced current-mode stimulation circuit, providing accurate and effective neural stimulation.This implantable neural interface, encompassing both recording and stimulation functionalities, also employed cutting-edge charge balancing and electrode-tissue interface impedance characterization techniques, all skillfully integrated within a compact 3mmx3mm area. Moreover, system design and integration were effectively carried out using FPGA for off-chip ECG and blood pressure recordings, and data transmission, which enabled efficient data processing and management capabilities for seamless operation. -
ResearcherLassonde School Of Engineering - York University Jan 2020 - Oct 2020North York, Ontario, Canada๐๐๐ฉ๐ก๐: ๐๐๐๐ฉ๐ช๐ง๐ ๐๐ญ๐ฉ๐ง๐๐๐ฉ๐๐ค๐ฃ ๐๐ฃ๐ ๐๐ก๐๐จ๐จ๐๐๐๐๐๐ฉ๐๐ค๐ฃ ๐ค๐ ๐๐พ๐ ๐จ๐๐๐ฃ๐๐ก ๐๐ค๐ง ๐๐๐๐ ๐๐ก๐ค๐ค๐ ๐ฅ๐ง๐๐จ๐จ๐ช๐ง๐ ๐๐๐ฉ๐๐๐ฉ๐๐ค๐ฃAs a vital aspect of Ph.D. project, we also focused on feature extraction and classification of ECG signals for high blood pressure detection. Our approach involved extracting QRST waveforms and time-domain features and utilizing RBF SVM classification techniques. We rigorously tested and evaluated our methods on ECG databases of MIT-BIH. ย Our results show that the implementation of the algorithm on a miniature Microsemi AGL250 low-power FPGA requires 493 logic elements, 7.4kbit of memory, consumes 19.98uW dynamic power (clocked at 1MHz), and yields a classification latency of 180us. The algorithm classification performance is evaluated on two different pre-recorded labeled ECG databases with 14 healthy and 14 sick subjects and shows an average sensitivity, specificity, and accuracy of 89%, 98%, and 94.5%, respectively. -
Research AssistantUniversity Of Tabriz Sep 2011 - Sep 2013Tabriz, East Azerbaijan Province, Iran๐๐๐ฉ๐ก๐: ๐ฟ๐๐จ๐๐๐ฃ ๐๐ฃ๐ ๐๐ข๐ฅ๐ก๐๐ข๐๐ฃ๐ฉ๐๐ฉ๐๐ค๐ฃ ๐ค๐ ๐ ๐๐ฎ๐จ๐ฉ๐๐ข ๐ค๐ฃ ๐๐๐๐ผ ๐๐ค๐ง ๐๐๐ง๐ก๐ฎ ๐ฟ๐๐ฉ๐๐๐ฉ๐๐ค๐ฃ ๐ค๐ ๐๐ฅ๐๐ก๐๐ฅ๐ฉ๐๐ ๐๐๐๐ฏ๐ช๐ง๐ ๐๐ฃ๐จ๐๐ฉ ๐๐ง๐ค๐ข ๐๐ก๐๐๐ฉ๐ง๐ค๐๐๐ง๐๐๐ค๐๐ง๐๐ฅ๐๐ฎ ๐๐๐๐ฃ๐๐ก๐จAs part of my M.Sc. project, I led the design and implementation of a power-efficient and low-cost biomedical signal processor, utilizing an FPGA, to enable early detection of epileptic seizure onset from electrocardiography (ECG) signals. Our approach involved designing an advanced feature extraction and classification algorithm, focusing on time-domain parameters and nonlinear characteristics derived from ECG signals. Leveraging LDA (Linear Discriminant Analysis) classification techniques, we achieved accurate and efficient detection, resulting in a sensitivity of 72%.
Fatemeh Es.Haghi Education Details
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Electronic Engineering
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Electronic Engineering -
Tabriz UniversityElectrical Engineering
Frequently Asked Questions about Fatemeh Es.Haghi
What company does Fatemeh Es.Haghi work for?
Fatemeh Es.Haghi works for Sonus Microsystems
What is Fatemeh Es.Haghi's role at the current company?
Fatemeh Es.Haghi's current role is Electronic Engineer @ Sonus Microsystems | Ph.D. in Electronic Engineering.
What schools did Fatemeh Es.Haghi attend?
Fatemeh Es.Haghi attended York University, Sahand University Of Technology, Tabriz University.
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