Felix Chen Email & Phone Number

Taipei City, Taiwan

10Gbps up to 800Gbps data center Ethernet Switch's NRZ/PAM4 differential signal integrity simulation and analysis, including pre-sim, layout constraint, post-sim and PCB layout quality assurance and improvement. Target to meet IEEE 802.3 CD/BS channel loss constraints and CAUI/GAUI eye openings with the lowest cost PCB material and stackup as well as TX cursors (Emphasis) and RX EQ (CTLE) settings.Worked on Broadcom, Marvell, Innovium Processors' IBIS AMI models as well as S-Parameters from component vendors and PCB EM model extraction.Also cover PCI express and USB as well as DDR4 memory signal integrity simulation with SI tools' test bench as well as DC Power (i.e. IR drop) and AC power (i.e. PDN impedance) integrity analysis with Keysight PI Pro tool.In addition, support hardware team to implement FPGA/CPLD.Use Ansys SIwave, Keysight ADS (a.k.a. Pathwave) and Cadence Allegro PCB editor and correlate with DQA's Tektronics's real-time scope.

Taipei Taiwan

6/2014 – 8/2016 Deputy director, Zenitron Corporation (a semiconductor distributor)Create and operate Zenitron Application Technology Center (www.ZenitronZone.com).Cross-sell to ODM customers in application of storage (with PMC Sierra’s data center and enterprise storage solution), networking (with Vitesse’s Ethernet switch and PHY solution), Clock and synchronization (with Zarlink’s Timing Solution), FPGA (with Actel FPGA) and power application (with Microsemi power over Ethernet solution).Build-up and manage a team of 12 FAEs to achieve OIW (Opportunity, In, Win) and KPI goals.

Taipei, Taiwan

Mar/2011 – Mar/2014 FAE Manager of Microsemi Taiwan Branch OfficeReport to country manager. Directly manage 7 Microsemi FAEs and indirectly manage FAEs of three distributors. Act FAE of Clock Timing (IEEE-1588, SyncE, Clock synth/buffer) and FPGA, focusing on 65nm FPGA featuring embedded ARM CM3 core, Serdes (incl. PCI-express), DDR3, Math block, AMBA/AXI.

Taipei, Taiwan

Nov1/2010 - Feb/2011 District sales manager for FPGA in Microsemi Taiwan BranchManage distributors for booking, billing, backlog, inventory, forecast and tier-1 opportunities. Work on quotation, pull-in/expedite and marcom events, e.g. seminar.

Taipei, Taiwan

Jul/2002 - Oct/2010 Senior FAE of Actel Corp (Microsemi acquired Actel in Nov 2010.)Responsible for product promotion and technical support in Taiwan, ASEAN/ANZ and India. Sell and support FPGA and IPs. Achieved multiple million$ local demand creations and design wins.

Taipei, Taiwan

Jun/2000 - Jun/2002 Senior hardware FAE of Transmeta Corp, Taiwan branch officeSupport Transmeta x86 compatible CPU in Ultra NoteBook PC and Webpad/Tablet.

Taipei, Taiwan

May/1998 - May/2000 FAE of Actel Corp for Greater China, based in TaipeiWas the first Actel employee in Greater China, India, ASEAN and ANZ. Support customer design activities and provide EDA design methodology training. Bring up Actel distributor Unique/Memec (now Avnet) FAE team in China.

Taipei, Taiwan

Jul/1997 – Apr/1998 FAE of Digital Semiconductor Inc, Taiwan branch office (Intel acquired Digital Semiconductor in 10/1997)Support StrongARM CPU in internet appliance and hand-held products.Support Ethernet controller in PCI bus and Card-bus application.

Hsinchu Taiwan

Nov/1994 – Jul/1997 Project Manager of D-Link Corp, Hsin-chu TaiwanLead an Ethernet-ATM bridge project with IDT MIPs RISC and Altera Flex 10K FPGA.

Taoyuan, Taiwan

Design Actel FPGA at ATM switch interface. Design 80c186 CPU call processing firmware in real-time OS in ISDN PABX group card.

Academic Exchange Program Student, Institute Of Telematik, Informatik

Activities and Societies: DAAD scholarshipPass German language admission test and experience the culture confrontation Design memory.

Master Degree, Electrical Engineering

Bachelor Degree, Control Engineering