* Product Lifecycle Management* Issue investigation using 8D methodologies like fishbone analysis and implementing corrective actions like respins* Configuration Management with Agile/SAP* Product enhancements and feature addition

* Power integrity and AC noise analysis with Hyperlynx to identify and resolve noise coupling* Investigation and root cause analysis of lockup under thermal stress on a DSP card with Intel Xeon-D SOC CPU

* Ruggedized hardware design* High speed digital design with focus on power and signal integrity* 8D root cause failure investigation

* Worked on new generation of fiscal electronic cash registers with integrated POS and wired (Ethernet)/ wireless (GSM-GPRS) connectivity features* Design hardware and firmware for new generation electronic cash registers, and other fiscal products like fiscal printers from concept to production* Manage third party vendors and ODMs in Taiwan, China and Korea for mass production of all hardware designed* Participate in Engineering Verification Testing (EVT), Design Verification Testing (DVT) and Production Verification Testing (PVT)* Manage design houses which participated in product design* Manage a team of hardware design engineers and software test team* Organize compliance testing of all hardware designed and solve issues that come up during testing* Help organize the lab environment for the reliability testing of all products during design and pre-production stages

* Designed a 3-axis Servo motor demo setup with intelligent Elmo servo controllers.* Designed inertially loaded servo testing setup industrial touchscreen display and intelligent Elmo servo controllers.* Architected a secure bluetooth headset with for Turkish police force which used a DSP to encrypt and decrypt audio data over GSM audio channels.

* Designed and brought up successfully highly complex hardware for high performance encryption appliance for 10 Gigabit Ethernet* Worked closely with ODMs and their engineering team throughout the whole design cycle* Used Corelis JTAG tools to prepare production level boundary scan test plans for the motherboards which also program CPLDs, PROMs and boot flash chips* Worked closely with software engineers and co-developed software for x-loader, u-boot, char drivers for Linux and applications for NetOS to bring up this sophisticated board* Determined the hardware diagnostic requirements for software engineers

* Designed and brought up successfully highly complex hardware for high performance Internet encryption appliances for fast Ethernet as well as Gigabit Ethernet using ORCAD, Concept as schematic capture tools and Cadence Allegro as the PCB layout tool* Used Corelis JTAG tools to prepare multiple test suites for these system boards as well as program CPLDs, PROMs and boot flash chips* High speed digital design experience with POS-PHY Level3 (PL3) and Level 4 (SPI4.2), FOCUS, MIPS SysAD bus, Gigabit Ethernet data/packet interfaces and RAMBUS, DDR, DDR2 and QDR memory systems with in depth knowledge of designing for good signal integrity* Designed and implemented various CPLDs and FPGAs using Xilinx and Synplicity synthesis tools* Determined the hardware diagnostic requirements for software engineers* Tested appliance for EMI compliance issues, identified and solved major problems

* Managed a group of technical staff for installation of complicated equipment in a high-tech woodworking mill * Designed MCU circuit and firmware for a optical device which measured the slope of wood grain on lumber for strength grading * Implemented high level software for this slope of grain detector using MS Visual C++ and MFC * Technical liaison between Barr-Mullin Inc. and Microtec of Italy for technology transfer between companies * Designed and tested various photodetector circuits including fiber-optic receivers and transmitters and custom PC interface cards for communication and data acquisition * Planned and implemented software in C and C++ language communication protocols for dual PC equipment to process laser-based scanner data * Prepared and supervised production procedures and documentation for optical and electronic assemblies inside this state-of-the-art laser scanning system * Evaluated and groomed system field performance