Responsible for the overall EE architecture of the system including actuation, automation, and infotainment.

- Created the compute architecture team from scratch, bootstrapped the sense architecture team with internal talent, and grew both teams into world-class organizations.- Co-inventor for a scheme to leverage sensing diversity to reduce the overhead required by brute force redundancy while maintaining fail operational capabilities.- Co-inventor for the original ANE architecture first introduced in the A11 Bionic SoC in the iPhone X and essentially in every iPhone, iPad, and Mac with Apple… Show more - Created the compute architecture team from scratch, bootstrapped the sense architecture team with internal talent, and grew both teams into world-class organizations.- Co-inventor for a scheme to leverage sensing diversity to reduce the overhead required by brute force redundancy while maintaining fail operational capabilities.- Co-inventor for the original ANE architecture first introduced in the A11 Bionic SoC in the iPhone X and essentially in every iPhone, iPad, and Mac with Apple Silicon since. Show less

Co-instruct the graduate level Digital Signal Processing class, EE264.

Developed TI’s technology roadmap to address the needs of advanced automotive safety and autonomous vehicles. Supported business units across the company with definition of differentiated products and directed advanced development programs to fill technology gaps. Drove alignment with senior management and promoted the adoption of lab outputs into product roadmaps.

Founder and technical advisor of a 26-person advanced development and research laboratory. Proposed and maintained a pipeline of projects in support of TI strategic goals. Defined and implemented research strategies to develop new markets. Drove alignment with senior management and promoted the adoption of lab outputs into product roadmaps. Oversaw the development of a wide range of technologies across the three lab groups:- Signal processing VLSI: Specialized in hardware architectures… Show more Founder and technical advisor of a 26-person advanced development and research laboratory. Proposed and maintained a pipeline of projects in support of TI strategic goals. Defined and implemented research strategies to develop new markets. Drove alignment with senior management and promoted the adoption of lab outputs into product roadmaps. Oversaw the development of a wide range of technologies across the three lab groups:- Signal processing VLSI: Specialized in hardware architectures for communications (e.g., 802.15.6, 802.15g, BLE), software-defined networking (OpenFlow), video (H.265) and stereo vision.- Signal processing for analog systems: Developed algorithms for compensation of analog and RF impairments ADC, pre-distortion of power amplifiers, loudspeaker protection and touch screen controllers.- Programmable processors: Designed application specific processors and reconfigurable logic fabrics. Show less

Founder and technical lead of the signal processing for analog systems group. Continued to lead the digital RF project and expanded its activities to include pipelined and interleaved ADC compensation (ADS54T0x), handset PA linearization and antenna tuning, motor control (InstaSpin) and high-speed serial I/O. Instrumental in increasing the impact of the R&D Labs to TI’s analog business units.

Technical lead for the Digital RF project in support of TI’s product line for digital pre-distortion (DPD) and crest factor reduction (CFR) of wireless base station power amplifiers. Responsible for the overall simulation and lab prototype framework as well as algorithmic enhancements to DPD. The resulting algorithms and architectures power the GC533x family of Digital RF wireless devices.

- 2005 - 2007: Responsible for system engineering, including fix-point analysis and bit accurate modeling, of the initial synchronization and MIMO encoder/decoder for mobile WiMax receivers. Member of the core team responsible for defining the architecture of the mobile WiMax system. Developed the C++ system level simulation used for performance analysis and silicon verification.- 2002 - 2004: Key contributor to the physical layer architecture development of AR7, the single chip ADSL modem… Show more - 2005 - 2007: Responsible for system engineering, including fix-point analysis and bit accurate modeling, of the initial synchronization and MIMO encoder/decoder for mobile WiMax receivers. Member of the core team responsible for defining the architecture of the mobile WiMax system. Developed the C++ system level simulation used for performance analysis and silicon verification.- 2002 - 2004: Key contributor to the physical layer architecture development of AR7, the single chip ADSL modem router solution. Responsible for hardware/software partitioning, digital/analog division and definition of signal processing blocks in AR7.- 2000 - 2001: Responsible for the signal processing specification of TI’s Ax5 chip-set for ADSL. Designed a novel HW-based automatic gain control approach. Led software engineering efforts for the implementation of the jitter-based timing recovery mechanism for Ax5's codecs. Show less