Frederic Hachon Email & Phone Number

Marseille Area, France

Research Engineer : Project Manager and Electronics Expert.Permanent position at CPPM (National Institute of Nuclear and Particle Physics (IN2P3).CERN collaborator

Geneva Area, Switzerland

International Collaboration between CERN and CNRS/IN2P3LHCb experiment : L0 Trigger and LHCb upgrade : Low Level Interface Manager

Marseille Area, France

The Center for Particle Physics of Marseilles (CPPM) is a lab of the National Institute for Particle and Nuclear Physics (IN2P3), a part of the CNRS and Aix-Marseille University. Research Engineer : Project Manager - Electronic expert - Senior FPGA designerData acquisition and trigger for LHCb experiment on the Large Hadron Collider, LHC in CERN+ 2015 : ARRIA 10 FPGA design for a new PCIe based boardUpgrade of the LLI with new ARRIA10 FPGA : 48 GBT@4.8Gb/s + 16 PCIe GEN3 @8Gb/s links.+ 2014-2013 : FPGA Design Manager for LHCb Upgrade at CERNThe Low Level Interface is a Stratix V FPGA design with : 24 GBT links @4.8Gb/s, 12 10GBE links @10Gb/s,Triple Speed Ethernet and ,PCIe GEN1 link.This design is running on the protoype build by CPPM lab for LHCb upgrade collaboration.I used the new Altera Qsys tool to mask the complexity of the design (multiprotocol, complex embedded IPs ..) and provide standards interfaces to the CERN designers.I am in charge of the firmware developement,FPGA timing and fitting issues, support and training for CERN users and others designers of the CNRS/IN2P3 labs.+ 2011 : LHCb Upgrade Project for CERNThe new read out system need to be x10 faster.Design of board based on a µTCA and ATCA Standard Telecom architecture.Signal integrity : Time Domain Reflectometer, S-Parameters, clocks jitters,clocks distributionOptical links charactrization : Bit Error Rate measurement and Eye Diagram Altera FPGA designs : StratixV, Stratix IV. VHDL,Verilog,Multiprotocol : PCIe,Giga Bit Transceivers,10 Gigabit Ethernet links Triple Speed Ethernet, 8B10B.Embedded C software in the NIOS II altera processorsDesign,tests,documentations, training and support for the CERN collaboration.+ 2008- 2010 : Read out Data design (TELL1) for LHCb in CERNComplex FPGA Design : 5 high density Altera Stratix GX.real time read out of the detectors from optical fibers, data compression, buid of Ethernet frame.System is running in CERN

Marseille Area, France

Electronic class to Master students and apprentices.

Grenoble Area, France

DTBS/STD/LDET LabTest Bench for a mixed ASIC in the field of imaging techniques based on X and gamma radiation.Management :Technicals specifications with the ASIC's designers of LETIManagement of Layout subcontractors and components suppliers. Mechanical packaging.Labview Human Machine Interface specification Board design :Analog : ADC & DAC to supply the ASIC and measure analogic and fast signalsDigital : FPGA and USB 2.0 microcontrollerFirmware : VHDL and C embeded software : ASIC configuration and tests

Test Bench System for a "Video, Data and Ethernet Hub"Project Management : Client, Specification,Layout Subtractors, Schedule and costsBoard Design, CAD, Embedded firmware in C of a 32 bits Coldfire Freescale Microcontroller, RF design and instrumentation.Industrialisation of pre-production of 100 products

MGP Instruments LamanonRadioprotection Monitoring System that detects radiations in nuclear power plants.Mixed Board Design : analogic for the detector (Ionization Chamber) and FPGA.High voltage power to supply the detector.Management of substactors and layout team.Test, Qualification and Industrialisation

Grenoble Area, France

DTBS/STD/LISA LabProfessional Thesis : CEA-LETI - Ecole Nationale Supérieure des Mines de Saint-Etienne Subject : "Development of an High Speed USB2.0 Contol-Command and Acquisition system"The system is used in the field of biotechnology applications and medical imagingBoard Design : microcontroller Cypress USB2.0 (8051) and FPGA Altera Cyclone.Firmware : VHDL and embedded C software in C Management : Sourcing components, Layout Substractor, Packaging

Electronics, Instrumentation, Automation, Software Engineer.Hamatsu photomultiplier tube,PID algorithm,PIC microcontroller

Projects for Defence, Energy, Telecomunications

Hardware Design, test and maintenance of Taximeters

Mastère Spécialisé, Embedded Systems, Bac + 6 : Institut Mines-Telecom, Ms Accrédité Conférence Des Grandes Ecoles

Activities and Societies: Professional Thesis at French Atomic Energy Commission (CEA).

Engineer’S Degree, Electronics - Telecom

Activities and Societies: Ecole Nationale Supérieure d'Arts et Métiers - ENSAM Aix en Provence

Master'S Degree, Instrumentation

D.U.T, Electronic

Activities and Societies: Electronic DUT (High Level Diploma)