Arman Galstyan Email & Phone Number

As a Senior ASIC Physical Design Engineer at Synopsys, I work on challenging and innovative projects that span the RTL to GDSII flow, using Synopsys EDA tools such as DC, ICC,ICC2, Primetime, and others. I have experience in logic synthesis, formal and logical equivalence verification, circuit simulation, physical verification, and design for manufacturability checks. I have contributed to the successful completion of multiple full-chip floorplan and implementation, placement, clock tree synthesis , optimization, timing closure, DRC/LVS, LEC, and sign-off tasks.I am also pursuing my master's degree in Computer Engineering of Integrated Circuits from Synopsys Armenia Educational Department, where I have completed coursework and projects using PERL, Python, and TCL programming. I have a bachelor's degree in VLSI from the same institution, and another 2 year course in Cybernetics, Automation, and Control from the National Polytechnic University of Armenia. I have also studied Computer Science at the Tumo Center for Creative Technologies, where I obtained certificates in HTML, CSS, and JavaScript from SoloLearn. I am always ready to learn new skills and improve my existing ones, and I am passionate about creating cutting-edge solutions for the semiconductor industry.

Listed skills include Npm, Logic Design, Git, Createjs, and 41 others.