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Gargi Sunil Email & Phone Number

MSc Imperial College London| JN Tata Scholar| KCMET Scholar| ex-ISRO Senior Satellite Payload Data Handling Electronics Designer| IIST at Riverlane
Location: London, England, United Kingdom 3 work roles 2 schools
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Current company
Riverlane
Role
MSc Imperial College London| JN Tata Scholar| KCMET Scholar| ex-ISRO Senior Satellite Payload Data Handling Electronics Designer| IIST
Location
London, England, United Kingdom
Company size
27 employees

Who is Gargi Sunil? Overview

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Gargi Sunil is listed as MSc Imperial College London| JN Tata Scholar| KCMET Scholar| ex-ISRO Senior Satellite Payload Data Handling Electronics Designer| IIST at Riverlane, a company with 27 employees, based in London, England, United Kingdom. AeroLeads shows a matched LinkedIn profile for Gargi Sunil.

Gargi Sunil previously worked as Senior FPGA Design Engineer at Riverlane and Scientist/Engineer SD at Space Applications Centre, Isro. Gargi Sunil holds Master Of Science - Msc, Analogue And Digital Integrated Circuit Design, Distinction, Msc Adic Outstanding Achievement Prize from Imperial College London.

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Riverlane

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Profile bio

About Gargi Sunil

I am a senior hardware engineer with six years of experience in FPGA/SoC based designs, specializing in Data Handling Electronics for Electro-optical Satellite Payloads. My journey began with a BTech in Avionics at the Indian Institute of Space Science and Technology, where I ranked in the top 10% of my class. Joining Space Applications Centre, ISRO as a scientist/engineer fulfilled my decade-long dream.My passion for high-speed microelectronics grew rapidly as I took up diverse projects spread across multiple domains such as channel coding, cryptography, formatting, image processing, real-time schedulers and deep learning. I swiftly learned multiple software development tools, new concepts, hardware devices, and their quality assurance procedures, gaining expertise in programming languages such as embedded C, VHDL, and Python, along with integrated development environments like Xilinx Vivado, ISE, Vitis AI, Microchip Libero IDE and Keil MicroVision. I have worked on hardware platforms like AMD Xilinx Virtex 5, Zynq SoC, Zynq Ultrascale+ MpSoC as well as Microchip RTG4, RTAX and ProAsic3E.

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Gargi Sunil's current company

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Riverlane
Riverlane
MSc Imperial College London| JN Tata Scholar| KCMET Scholar| ex-ISRO Senior Satellite Payload Data Handling Electronics Designer| IIST
cambridge, cambridgeshire, united kingdom
Website
riverlane.io
Employees
27
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3 roles

Gargi Sunil work experience

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Senior Fpga Design Engineer

Current
Riverlane

Cambridge, England, United Kingdom

Oct 2024 - Present

Scientist/Engineer Sd

Space Applications Centre, Isro

Ahmedabad, Gujarat, India

  • Responsibilities:
  • Performing FPGA-based Payload Data Handling Electronics (PDHE) design and development for 2 earth-observation satellites, and VHDL-based testbench development and MATLAB-based test unit development for PDHE verification.
  • Conducting R&D for edge deployment of Onboard Cloud Detection CNN algorithms
  • Collaborating with 10+ Designers from Systems, Detector Design, Analog Front-End and Baseband Data Handling System teams to finalize interface requirements and carry out interface testing and verification.
  • Performing payload-level and satellite-level testing in close coordination with Ground Checkout team and UR Rao Satellite Centre (URSC), respectively.Achievements:
  • Successfully tested, verified, and flagged off payloads of Oceansat-3 and Indian Nanosatellite-2B (currently operational satellites providing high quality images), within stipulated time.
Jul 2021 - Oct 2023

Scientist/Engineer Sc

Space Applications Centre, Isro

Ahmedabad, Gujarat, India

  • Responsibilities:
  • Performed payload data handling electronics design and development for 6 earth observation satellites (GISAT-1, GISAT-2, Cartosat-3, Cartosat-3A, HySIS and GSAT-29); Performed R&D of Solid State Recorder for.
  • Collaborated with 30+ Designers from Systems, Detector Design, Analog Front-End and Baseband Data Handling System teams to finalize interface requirements, and carry out interface testing and verification.
  • Prepared Payload Telecommand and Telemetry Detail Document for circulation to URSC and ISTRAC; Prepared documentation for PDHE Datapack, PDHE Test Cases (70+ testcases), and Payload Data Format, for URSC and NRSC.
  • Coordinated with URSC, ISRO Telecommand, Telemetry and Command Network (ISTRAC) for telecommand telemetry sequence verification and National Remote Sensing Centre (NRSC) for ground segment payload data format.
  • Represented the division of 30 members, in a task team to conduct studies on recent developments in data handling electronics employed in small satellites, and submitted preliminary report.Achievements:
Aug 2017 - Jun 2021
Team & coworkers

Colleagues at Riverlane

Other employees you can reach at riverlane.io. View company contacts for 27 employees →

AV Alvaro Veliz Osorio Alvaro Veliz Osorio Colleague at Riverlane United Kingdom, United Kingdom View → MB Marius Bothe Marius Bothe Colleague at Riverlane London, England, United Kingdom, United Kingdom View → DF Damien Fontaine Damien Fontaine Colleague at Riverlane Greater Cambridge Area, United Kingdom View → AZ Anne Z. Anne Z. Colleague at Riverlane Cambridge, Massachusetts, United States, United States View → FS Fnu Setiawan Fnu Setiawan Colleague at Riverlane Cambridge, Massachusetts, United States, United States View → AJ Alex Jeckells Alex Jeckells Colleague at Riverlane Ely, England, United Kingdom, United Kingdom View → LS Luka Skoric Luka Skoric Colleague at Riverlane Cambridge, England, United Kingdom, United Kingdom View → LM Luigi Martiradonna Luigi Martiradonna Colleague at Riverlane London, England, United Kingdom, United Kingdom View → CS Christoph Sünderhauf Christoph Sünderhauf Colleague at Riverlane Cambridge, England, United Kingdom, United Kingdom View → AP Asher Pearl Asher Pearl Colleague at Riverlane Cambridge, England, United Kingdom, United Kingdom View →
2 education records

Gargi Sunil education

Master Of Science - Msc, Analogue And Digital Integrated Circuit Design, Distinction, Msc Adic Outstanding Achievement Prize

Imperial College London
FAQ

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What company does Gargi Sunil work for?

Gargi Sunil works for Riverlane.

What is Gargi Sunil's role at Riverlane?

Gargi Sunil is listed as MSc Imperial College London| JN Tata Scholar| KCMET Scholar| ex-ISRO Senior Satellite Payload Data Handling Electronics Designer| IIST at Riverlane.

Where is Gargi Sunil based?

Gargi Sunil is based in London, England, United Kingdom while working with Riverlane.

What companies has Gargi Sunil worked for?

Gargi Sunil has worked for Riverlane and Space Applications Centre, Isro.

Who are Gargi Sunil's colleagues at Riverlane?

Gargi Sunil's colleagues at Riverlane include Alvaro Veliz Osorio, Marius Bothe, Damien Fontaine, Anne Z., and Fnu Setiawan.

How can I contact Gargi Sunil?

You can use AeroLeads to view verified contact signals for Gargi Sunil at Riverlane, including work email, phone, and LinkedIn data when available.

What schools did Gargi Sunil attend?

Gargi Sunil holds Master Of Science - Msc, Analogue And Digital Integrated Circuit Design, Distinction, Msc Adic Outstanding Achievement Prize from Imperial College London.

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