Gary Stevens Email & Phone Number

Boston, Ma

ASIC and FPGA design for a fabless semiconductor company. Digital design in mixed A/D and Standard Cell ASICs. Logic synthesis, verification and chip layout (P&R through LVS and manual edits) on UNIX and PC workstations utilizing multiple vendors and multiple toolsets. Board level design with OrCAD. RTL and testbench design in VHDL and Verilog. Packaging and test for protos and production. Extensive customer and vendor interface and project management.

Hopkinton, Ma

Led a team of H/W, S/W, and test engineers in memory product development on a product line with annual sales of over $60M. Managed H/W engineering across Networking, Memory, and Mass Storage product lines. Co-architected HW platform for Clearpoint's first networking Bridge product. Designed several memory array products.

Hopkinton, Ma

Hardware design and project management of the DCMS series of SCSI host adapters (peripheral interfaces connecting disk and tape to DEC's VAX-BI bus). Reverse engineered the VAX-BI bus and VAX systems, designed the SCSI adapter, and received three patents based on this work.Other projects included architecture of networking and memory products, ASIC architecture, and memory design.

Marlborough, Ma

Architecture and design consultation on next generation memory system. Design assistance on next generation ANNEX product and special ANNEX versions for customer.

Marlborough, Ma

Hardware design and project management of Encore's ANNEX Ethernet terminal server. Hardware and firmware design of EDC memory for the MULTIMAX, Encore's multiprocessor computer. Firmware design for the MULTIMAX SCSI host adapter. System performance modeling in C. Power system and battery backup design. FCC testing.

Framingham, Ma

Development of a high performance CPU which executed the 68010 instruction set at 12 MIPS. One of the principal members of the team developing this highly pipelined, 100K ECL CPU. Responsible for design of the I-Unit and contributed to CPU architecture and staffing. Other projects included H/W design of the TP-308 eight channel serial multiplexor, firmware development for the PI-11 SCSI host adapter emulating a DEC RLV12/RL01 disk subsystem, and design of both hardware and firmware for the CC-1 SCSI host adapter on the VERSAbus. Group leader for I/O and mass storage products.

Westboro, Ma

Helped develop the specifications for and implement a 2Mb/sec local area network, Data General's first LAN product. Projects included hardware and firmware design for an SSI/MSI based LAN controller, conversion of this design to an ASIC and specification and design of an 8051 based workstation cluster controller for the network.

Portsmouth, Ri

Responsible for analysis of CAE tools for the division. Developed Raytheon's first library of 10K ECL digital simulation models.