Gary Stevens

Gary Stevens Email and Phone Number

Principal Engineer at iSine Inc. @ iSine Inc.
melville, new york, united states
Gary Stevens's Location
Somerville, Massachusetts, United States, United States
Gary Stevens's Contact Details
About Gary Stevens

Gary Stevens is a Principal Engineer at iSine Inc. at iSine Inc.. He possess expertise in asic, fpga, semiconductors, firmware, verilog and 29 more skills.

Gary Stevens's Current Company Details
iSine Inc.

Isine Inc.

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Principal Engineer at iSine Inc.
melville, new york, united states
Website:
isine.com
Employees:
11
Gary Stevens Work Experience Details
  • Isine Inc.
    Principal Engineer
    Isine Inc. Jun 1993 - Present
    Boston, Ma
    ASIC and FPGA design for a fabless semiconductor company. Digital design in mixed A/D and Standard Cell ASICs. Logic synthesis, verification and chip layout (P&R through LVS and manual edits) on UNIX and PC workstations utilizing multiple vendors and multiple toolsets. Board level design with OrCAD. RTL and testbench design in VHDL and Verilog. Packaging and test for protos and production. Extensive customer and vendor interface and project management.
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  • Clearpoint Research Corp.
    Engineering Manager
    Clearpoint Research Corp. Mar 1990 - Feb 1993
    Hopkinton, Ma
    Led a team of H/W, S/W, and test engineers in memory product development on a product line with annual sales of over $60M. Managed H/W engineering across Networking, Memory, and Mass Storage product lines. Co-architected HW platform for Clearpoint's first networking Bridge product. Designed several memory array products.
  • Clearpoint Research Corp.
    Project Engineer
    Clearpoint Research Corp. Apr 1987 - Mar 1990
    Hopkinton, Ma
    Hardware design and project management of the DCMS series of SCSI host adapters (peripheral interfaces connecting disk and tape to DEC's VAX-BI bus). Reverse engineered the VAX-BI bus and VAX systems, designed the SCSI adapter, and received three patents based on this work.Other projects included architecture of networking and memory products, ASIC architecture, and memory design.
  • Encore Computer Corp.
    Consultant
    Encore Computer Corp. Apr 1987 - Feb 1988
    Marlborough, Ma
    Architecture and design consultation on next generation memory system. Design assistance on next generation ANNEX product and special ANNEX versions for customer.
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  • Encore Computer Corp.
    Project Engineer
    Encore Computer Corp. Jul 1984 - Apr 1987
    Marlborough, Ma
    Hardware design and project management of Encore's ANNEX Ethernet terminal server. Hardware and firmware design of EDC memory for the MULTIMAX, Encore's multiprocessor computer. Firmware design for the MULTIMAX SCSI host adapter. System performance modeling in C. Power system and battery backup design. FCC testing.
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  • Charles River Data Systems
    Senior Engineer
    Charles River Data Systems Jun 1981 - Jul 1984
    Framingham, Ma
    Development of a high performance CPU which executed the 68010 instruction set at 12 MIPS. One of the principal members of the team developing this highly pipelined, 100K ECL CPU. Responsible for design of the I-Unit and contributed to CPU architecture and staffing. Other projects included H/W design of the TP-308 eight channel serial multiplexor, firmware development for the PI-11 SCSI host adapter emulating a DEC RLV12/RL01 disk subsystem, and design of both hardware and firmware for the CC-1 SCSI host adapter on the VERSAbus. Group leader for I/O and mass storage products.
  • Data General Corp.
    Engineer
    Data General Corp. Jun 1978 - Jun 1981
    Westboro, Ma
    Helped develop the specifications for and implement a 2Mb/sec local area network, Data General's first LAN product. Projects included hardware and firmware design for an SSI/MSI based LAN controller, conversion of this design to an ASIC and specification and design of an 8051 based workstation cluster controller for the network.
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  • Raytheon - Submarine Signal Division
    Coop / Jr. Engineer
    Raytheon - Submarine Signal Division Jun 1976 - Jan 1978
    Portsmouth, Ri
    Responsible for analysis of CAE tools for the division. Developed Raytheon's first library of 10K ECL digital simulation models.
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Gary Stevens Skills

Asic Fpga Semiconductors Firmware Verilog Hardware Architecture Vhdl Integrated Circuit Design Mixed Signal Electronics Ic Logic Synthesis Microprocessors Engineering Management Ethernet Processors Embedded Systems Hardware C Unix Debugging Application Specific Integrated Circuits Dft Rtl Design Physical Design Pcb Design Tcl Testing Scsi Orcad Lvs Static Timing Analysis Computer Hardware Field Programmable Gate Arrays

Gary Stevens Education Details

Frequently Asked Questions about Gary Stevens

What company does Gary Stevens work for?

Gary Stevens works for Isine Inc.

What is Gary Stevens's role at the current company?

Gary Stevens's current role is Principal Engineer at iSine Inc..

What is Gary Stevens's email address?

Gary Stevens's email address is gw****@****ems.com

What is Gary Stevens's direct phone number?

Gary Stevens's direct phone number is +161769*****

What schools did Gary Stevens attend?

Gary Stevens attended University Of Rhode Island.

What skills is Gary Stevens known for?

Gary Stevens has skills like Asic, Fpga, Semiconductors, Firmware, Verilog, Hardware Architecture, Vhdl, Integrated Circuit Design, Mixed Signal, Electronics, Ic, Logic Synthesis.

Who are Gary Stevens's colleagues?

Gary Stevens's colleagues are Robert Gross.

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