Gary Yi Email and Phone Number
Gary Yi work email
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Gary Yi personal email
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A highly innovative and self motivated R&D Engineer/Manager with solid background from design, process and process integration，advanced device packaging with outstanding track record in technology development from concept to volume manufacture;A process and process integration expert using semiconductor process and equipment to fabricate optical, sensor, NEMS, and MEMS functional devices for hi-tech applications;A great team builder/manager with capability to inspiring people with great track record to establish high performance cross-function technology teams to deliver project in time with high quality using essential project management skills;A great friend and colleague owned trust through sharing and jointed ownership as well as through inspiring communication.
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Vice President Of Assembly And Packaging OperationsLyteSan Jose, Ca, Us -
Vice President Of OperationsWell-Funded Us Silicon Valley Stealth Startup Jul 2024Device packaging, supply chain management, foundry and OSAT interface
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Senior Director Of Si PhotonicsO-Net Silicon Photonics (Usa) Inc. Feb 2021 - Jul 2024Job responsibilities:1. Develop and work with foundry on process development and process integration solution for CMOS-based Si Photonics chips for RnD and volume production.2. Develop and work with foundry on process development and process integration solution for III-V. based photonic chips for RnD and volume production.3. Owner and leader for developing packaging solutions/platforms/advanced processes for Co-packaged optics devices and modules.4. Foundry interface for technical contract and wafer acceptance. 5. Contract Manufacture Management.6. Wafer downstream process, reliability, and FA.
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Director Of Foundry Interface, Si Photonic Process IntegrationFuturewei Technologies Jan 2019 - Jan 2021Foundry Interface, technology development to volume manufacture enabling.
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Principal Engineer In Si PhotonicsHuawei Technologies Aug 2016 - Jan 2019Shenzhen, Guangdong, CnWafer Integration/Foundry Interaction Futurewei Technologies, IncHuawei US R&D Center -
Senior Staff Eng. For Mems Wafer IntegrationFormfactor Inc. Nov 2015 - Aug 2016Livermore, Ca, UsLead the 2D vertical spring probe (VSP) wafer process integration for manufacturability through MEMS wafer process to support probe card built for semiconductor chip manufacturers; Carry out process development and improvement for manufacturability; Develop routing and process control plan for volume production; Propose inter or intra process modules trade-off or optimization for wafer line process stability and yield improvement; FA and yield system establishment for the new products;Lead the product qualification for production transfer. -
Engineering ManagerWestern Digital Sep 2007 - Oct 2015San Jose, Ca, UsSenior Engineering Manager, with hand-on experience on process module integration and process design, led a team of engineers in thin film, RIE, PECVD, photo-lithography to develop advanced Photonic devices, and NEMS device to support HAMR recording heads and advanced writer component for PMR heads. -
Staff EngineerSeagate Technology May 2002 - Sep 2007Fremont, Ca, UsMagnetic sensor and reader stack development and integration -
Research Associate In Department Of Physics And James Watt Nanofabrication CenterThe University Of Glasgow Sep 1998 - May 2002Glasgow, Glasgow, Gb
Gary Yi Skills
Gary Yi Education Details
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University Of BristolMaterial Physics
Frequently Asked Questions about Gary Yi
What company does Gary Yi work for?
Gary Yi works for Lyte
What is Gary Yi's role at the current company?
Gary Yi's current role is Vice President of Assembly and packaging Operations.
What is Gary Yi's email address?
Gary Yi's email address is ga****@****ail.com
What schools did Gary Yi attend?
Gary Yi attended University Of Bristol.
What skills is Gary Yi known for?
Gary Yi has skills like Team Leadership, Technical Leadership, Nanofabrication, Thin Film Process, Technology Integration, Engineering Management, Technical Innovation, R&d, Sensor Design, Reactive Ion Etching, Mems Design And Process, Project Management.
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