Gavin Parnaby Email & Phone Number

San Diego

Illumina acquired Edico in 2018Deep learning, AI, machine learning, image/signal processing, computational biology algorithm development for primary, secondary and tertiary analysis, algorithm + systems design for both software + hardwareBioinformatics algorithm development in C++, Python, Keras, Tensorflow.Accelerated compute solutions on FPGAManage ML team as part of industry leading DRAGEN secondary analysis

Greater San Diego Area

Machine learning & computational biology algorithm development for secondary analysis using Matlab, Python, R, C++ accelerated using FPGA.

Irvine

Systems architecture and detailed implementation for high data-rate systems (40/50/100Gb/s+) focusing on systems modeling, adaptive algorithm design and implementation [linear/nonlinear modeling, filtering, estimation, time series analysis, spectral analysis], and performance analysis/optimization/debug.Highly time interleaved system development, patented novel synchronization approachSoftware development (C++/Linux, Java, Matlab, Python, Perl, embedded C)Hardware specification… Show more Systems architecture and detailed implementation for high data-rate systems (40/50/100Gb/s+) focusing on systems modeling, adaptive algorithm design and implementation [linear/nonlinear modeling, filtering, estimation, time series analysis, spectral analysis], and performance analysis/optimization/debug.Highly time interleaved system development, patented novel synchronization approachSoftware development (C++/Linux, Java, Matlab, Python, Perl, embedded C)Hardware specification, design, debug End to end C++ simulation design and implementation [STL, boost, Linux]SERDES, long reach optical, datacenter technologies Show less

Santa Clara

Technical marketing, product definition and architecture for automotive systems and next-gen Ethernet.

Broadband Communications GroupDeveloped algorithms for wireless + wired OFDM SoCs including DVB-T, ISDB-T, EPOC (Ethernet over coax)Designed iterative frequency-domain message passing receiver algorithms to improve performance in conditions with extreme interferenceC++ (STL, boost), Matlab simulation designAlgorithm research and development, custom ASIC hardware implementation

Irvine, Orange County, Ca

DSP architect and simulation lead for the industry's first and lowest power 10GBASE-T solution, end to end simulation and algorithm development in C++Met very aggressive schedule for systems definition, specification, development - beat Broadcom to market by >18 months despite a much smaller team & limited resources, established standards leadership and critical IPResearched and designed algorithms in C++ and Matlab for adaptive processing, nonlinear modeling, estimation, noise… Show more DSP architect and simulation lead for the industry's first and lowest power 10GBASE-T solution, end to end simulation and algorithm development in C++Met very aggressive schedule for systems definition, specification, development - beat Broadcom to market by >18 months despite a much smaller team & limited resources, established standards leadership and critical IPResearched and designed algorithms in C++ and Matlab for adaptive processing, nonlinear modeling, estimation, noise cancellation, SNR maximization, equalization, online gradient descent, adaptive learning, Fourier methods, state-space models, highly parallelized implementation for custom ASIC solutionEmbedded firmware optimization and debugRepresented Solarflare at IEEE and performed technical marketing with customersEditor and ad hoc chair for IEEE Energy Efficient Ethernet (802.3az) reducing link power by up to 90% during periods of low link utilizationMultiple patents Show less

Master’S Degree, Electrical And Information Sciences

Dissertation: 'The application of recurrent neural networks and RBFs to the stock options pricing problem using Black-Scholes.' Trained.

Bachelor Of Arts (Honours), Electrical And Information Sciences (Electronic Engineering)

Electives in digital communications, software engineering, machine learning, business development.

Education record