Silicon Architecture Engineer
Current• Aurora Supercomputer (2016-2018) o Developed and analyzed a novel fabric partitioning scheme for the Dragonfly topology, which eliminated communication interference between applications and limited bandwidth loss using a pseudo-direct link & routing scheme o Characterized the Megafly topology, a new highly scalable topology, using at-scale simulations (over 100,000 nodes) with multiple traffic patterns to uncover potential performance bottlenecks • Accelerator to Accelerator Fabric (2019) o Explored trade-offs for a GPU-to-GPU accelerator fabric in simulation o Compared multiple topologies using machine learning communication patterns