Manage a department of 125 engineers in 6 technical teams: DSP systems, ASIC/FPGA, digital hardware, RF, power systems, Radiation, and Parts Materials & Processes. Work closely with the Business facing systems engineering groups to coordinate project staffing, proposal support, and engineering review. Collaborate with the Advanced Programs team to identify critical technology for IRaD investment and staff the teams to execute the projects. promoting initiatives to standardize engineering tools and design infrastructure to transform the design process and accelerate the design to delivery cycle. Working with tech disciplines to establish consistent design environments and capture and disseminate best practices to facilitate rapid project initiation and execution.

Successfully recruited talent and incorporated them into the team to meet business demands. Leveraged leaders within the team to develop the guiding principles and focus of the newly formed DSP team. Developed the DSP Systems Engineering process to define and identify the purpose of the DSP team. Guided the team leaders in developing our best practices defining how we develop and document our optimized algorithms for high reliability space payloads.

Developed a novel lossless data compression algorithm tailored to sampled RF signals and optimized the encoder and decoder implementations in C++ and FPGA High Level Synthesis. Oversaw test and evaluation against operational data, and provided detailed performance analysis. Developed a novel multi-receiver bandwidth combining algorithm to enable the capture of Wideband RF spectrum. Developed end to end simulation of RF down conversion processing, digitization, cross-channel mismatch estimation and compensation techniques, and bandwidth combining processing. Combined multiple optimizations to implement the algorithm in C with CUDA to run on an Nvidia GPU as a real-time multiGsps streaming process.

Key resource overseeing speech processing work with multiple sponsors. Led two rapid technology transfer efforts creating a Voice Activity Detector and Voice Filter based on University of Maryland research applications for a USG sponsor with critical noisy audio triage needs. Fielded ten prototype units to the customer’s toughest locations demonstrating their performance, which resulted in the sponsor shifting almost all their speech processing work (~$1M/year) to APL. The work involved rewriting auditory cortical model code to make it a real-time streaming process. Incorporated high level optimizations such as multi-rate filtering, complex FFT/IFFT based wavelet filtering, and streamlined the process flow. Concurrently coordinated the prototype electronic design, packaging, and guided the embedded C code development. The VAD and VF performance were independently tested verifying their best-in-class performance. Developed a strong trust relationship with the USG COTR through collaboration in planning and executing additional work including tech transfer of i-vector PLDA based speaker and language ID applications originally developed for DARPA including incorporating the spectro-temporal cortical features and investigating AI/ML approaches. Built up and managed 3 Linux servers with Nvidia GPUs, including installation of CUDA and other ML toolkits. Systems were on a LAN with a NAS to store audio corpora that I acquired and curated to support audio/speech processing application development and testing.Outstanding performance for this sponsor led to additional sponsor engagements and work evaluating speech processing applications being developed and tested by JHU HLT COE, SRI and others for DARPA for use in processing customer audio and developing speech processing service architectures (~$2M/year).Held Program Management (sponsor engagement), Line Management (staff development), Chief Engineer (quality oversight), and Project Management roles at APL.

Developed expertise in DoD Small Business Innovative Research (SBIR) program engagement successfully leading the award and completion of two Phase II SBIRs. As a manager in a small company with less than 100 people, I was directly responsible for developing proposals, creating technical concepts, writing all required elements, defending proposal in front of the Navy’s SBIR technical review panel, project management, technical execution, and all technical report writing.Developed technical skills in RF communications systems, Precision Navigation and Timing, and SDR hardware design. Led the development of a wide band RF compact cPCI board to support specialized RF testing and software defined radio products. Designed hardware around state-of-the-art 1 Gsps ADC and DAC ICs and a Xilinx FPGA. Architected the overall system and oversaw all elements of the hardware design and personally designed the RF signal chain. Design became the basis for Avtec Systems high speed space telemetry receivers and RF protocol test systems. Work was part of a USAF SBIR effort to develop a hardware-in-the-Loop tester for the DoD LINK 16 communications system. Personally developed expertise in the LINK 16 RF and navigation protocols and network operations to support overall system design. Built RF up/down converter front end interface to the wide band RF cPCI board, and acquired all necessary terminals and control software to support test of final system. Designed a custom control panel for the ViaSat MIDS terminal to support stand-alone operation.

Developed expertise in low noise piezoelectric sensor preamp design, vibration sensing, and vector hydrophone design. Led the development of an experimental seismic accelerometer for a study by the Incorporated Research Institutions for Seismology (IRIS) on low noise high fidelity seismic sensors. Oversaw the mechanical engineers in the design of the sensing element and ran noise simulations on the proposed designs. Personally designed circuitry and PCB layout for an extremely low noise differential charge amplifier to directly mate to the high precision 24 bit digitizers with a +/-25V input range used by the customer. Led the development of a vector hydrophone for the Navy. Designed the low noise preamplifier and collaborated with data acquisition and algorithm developers to ensure overall system performance objectives were met. Supported field testing at several USN facilities with custom signal conditioning hardware and onsite troubleshooting and equipment setup. Personally developed multiple MathCad and Spice files capturing knowledge on piezoelectric sensor preamp design considerations and directed the development of CAD/CAE tools to capture knowledge of piezoelectric sensing element design. Gained executive level experience in a small business (~80 employees) as the Director of Product Engineering developing industrial, and instrumentation piezoelectric sensors. Involved in business planning, strategic internal product development (IPD) decisions, and decisions driven by business conditions from bonuses to layoffs. Worked directly with Sales and Marketing to support custom sensor requests and field support issues. Resolved long standing product reliability issue resulting from RoHS changes in products. Worked directly with production to ensure design for manufacturability (DFM) and to resolve production issues. Developed streamlined ISO9001 Internal Product Development process focusing on decision points and transparency.